3 Commits

Author	SHA1	Message	Date
mrg	83e5848728	Change FreePDK and SCMOS 2rw cell to share gnd power rail.	2022-03-30 13:48:53 -07:00
mrg	f7e3672c89	Route horizontal supplies in write driver.	2022-03-01 14:37:51 -08:00
mrg	cf63499e76	Convert bitcells to 1port and 2port	2020-11-13 08:09:21 -08:00