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https://github.com/VLSIDA/OpenRAM.git
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Use library imports globally
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@@ -19,12 +19,11 @@ We obtained this file from Qflow ( http://opencircuitdesign.com/qflow/index.html
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and include its appropriate license.
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"""
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import os
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import re
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import shutil
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import debug
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from globals import OPTS
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from openram import debug
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from openram import OPTS
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from .run_script import *
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# Keep track of statistics
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num_drc_runs = 0
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@@ -96,12 +95,12 @@ def write_drc_script(cell_name, gds_name, extract, final_verification, output_pa
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# Flatten the transistors
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# Bug in Netgen 1.5.194 when using this...
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try:
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from tech import blackbox_cells
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from openram.tech import blackbox_cells
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except ImportError:
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blackbox_cells = []
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try:
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from tech import flatglob
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from openram.tech import flatglob
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except ImportError:
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flatglob = []
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f.write("gds readonly true\n")
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