luke/OpenRAM
1
0
Fork 0
mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-08-30 18:02:23 +02:00
Code Issues Packages Projects Releases Wiki Activity

Use library imports globally

Browse Source
This commit is contained in:
Eren Dogan
2022-11-27 13:01:20 -08:00
parent 037468d88d
commit fccdc3c45b
455 changed files with 3254 additions and 3083 deletions
Download Patch File Download Diff File Expand all files Collapse all files
compiler/modules/replica_bitcell_array.py
+7 -8
View File
@@ -3,15 +3,14 @@
# Copyright (c) 2016-2021 Regents of the University of California
# All rights reserved.
#
import debug
from base import vector
from base import contact
from openram import debug
from openram.base import vector
from openram.base import contact
from openram.sram_factory import factory
from openram.tech import drc, spice
from openram.tech import cell_properties as props
from openram import OPTS
from .bitcell_base_array import bitcell_base_array
from tech import drc, spice
from tech import cell_properties as props
from globals import OPTS
from sram_factory import factory
class replica_bitcell_array(bitcell_base_array):