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Merge branch 'dev' of https://github.com/VLSIDA/PrivateRAM into multiport

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Michael Timothy Grimes
2018-09-18 18:56:15 -07:00
parent 43f5316eed a58b1906ad
commit fc5f163828
84 changed files with 18543 additions and 389 deletions
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compiler/tests/testutils.py
+10 -6
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@@ -227,17 +227,21 @@ class openram_test(unittest.TestCase):
check = filecmp.cmp(filename1,filename2)
if not check:
debug.error("MISMATCH file1={0} file2={1}".format(filename1,filename2))
f1 = open(filename1,"r")
s1 = f1.readlines().decode('utf-8')
f1 = open(filename1,mode="r",encoding='utf-8')
s1 = f1.readlines()
f1.close()
f2 = open(filename2,"r").decode('utf-8')
f2 = open(filename2,mode="r",encoding='utf-8')
s2 = f2.readlines()
f2.close()
mismatches=0
for line in difflib.unified_diff(s1, s2):
for line in list(difflib.unified_diff(s1, s2)):
mismatches += 1
self.error("DIFF LINES:",line)
if mismatches>10:
if mismatches==0:
print("DIFF LINES:")
if mismatches<11:
print(line.rstrip('\n'))
else:
return False
return False
else: