Add boundary to every module and pgate for visual debug.

compiler/pgates/pgate.py

@@ -31,17 +31,18 @@ class pgate(design.design):
         self.create_netlist()
         if not OPTS.netlist_only:        
             self.create_layout()
+            self.add_boundary()
             self.DRC_LVS()
         
 
-    def create_netlist():
+    def create_netlist(self):
         """ Pure virtual function """
         debug.error("Must over-ride create_netlist.",-1)
         
-    def create_layout():
+    def create_layout(self):
         """ Pure virtual function """
         debug.error("Must over-ride create_layout.",-1)
-        
+
     def connect_pin_to_rail(self,inst,pin,supply):
         """ Connects a ptx pin to a supply rail. """
         source_pin = inst.get_pin(pin)