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Altering sense amp array and write driver array so spacing between amps/drivers accomodates multiport. Also altering sense amp array and write driver array tests to include multiport cases.

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This commit is contained in:
Michael Timothy Grimes
2018-08-31 23:28:06 -07:00
parent 75d77095d0
commit f3cca7eea0
4 changed files with 60 additions and 5 deletions
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compiler/tests/10_write_driver_array_test.py
Executable → Regular
+16 -1
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@@ -17,6 +17,7 @@ class write_driver_test(openram_test):
globals.init_openram("config_20_{0}".format(OPTS.tech_name))
import write_driver_array
# check write driver array in single port
debug.info(2, "Testing write_driver_array for columns=8, word_size=8")
a = write_driver_array.write_driver_array(columns=8, word_size=8)
self.local_check(a)
@@ -25,7 +26,21 @@ class write_driver_test(openram_test):
a = write_driver_array.write_driver_array(columns=16, word_size=8)
self.local_check(a)
globals.end_openram()
# check write driver array in multi-port
OPTS.bitcell = "pbitcell"
OPTS.rw_ports = 1
OPTS.w_ports = 1
OPTS.r_ports = 1
debug.info(2, "Testing write_driver_array for columns=8, word_size=8")
a = write_driver_array.write_driver_array(columns=8, word_size=8)
self.local_check(a)
debug.info(2, "Testing write_driver_array for columns=16, word_size=8")
a = write_driver_array.write_driver_array(columns=16, word_size=8)
self.local_check(a)
#globals.end_openram()
# instantiate a copy of the class to actually run the test
if __name__ == "__main__":