Altering sense amp array and write driver array so spacing between amps/drivers accomodates multiport. Also altering sense amp array and write driver array tests to include multiport cases.

This commit is contained in:
Michael Timothy Grimes
2018-08-31 23:28:06 -07:00
parent 75d77095d0
commit f3cca7eea0
4 changed files with 60 additions and 5 deletions
+13 -2
View File
@@ -30,7 +30,11 @@ class sense_amp_array(design.design):
def create_layout(self):
self.height = self.amp.height
self.width = self.amp.width * self.word_size * self.words_per_row
if self.bitcell.width > self.amp.width:
self.width = self.bitcell.width * self.word_size * self.words_per_row
else:
self.width = self.amp.width * self.word_size * self.words_per_row
self.place_sense_amp_array()
self.add_layout_pins()
@@ -53,6 +57,10 @@ class sense_amp_array(design.design):
self.amp = self.mod_sense_amp("sense_amp")
self.add_mod(self.amp)
c = reload(__import__(OPTS.bitcell))
self.mod_bitcell = getattr(c, OPTS.bitcell)
self.bitcell = self.mod_bitcell()
self.add_mod(self.bitcell)
def create_sense_amp_array(self):
self.local_insts = []
@@ -68,7 +76,10 @@ class sense_amp_array(design.design):
def place_sense_amp_array(self):
amp_spacing = self.amp.width * self.words_per_row
if self.bitcell.width > self.amp.width:
amp_spacing = self.bitcell.width * self.words_per_row
else:
amp_spacing = self.amp.width * self.words_per_row
for i in range(0,self.word_size):
amp_position = vector(amp_spacing * i, 0)
self.local_insts[i].place(amp_position)
+17 -2
View File
@@ -30,7 +30,12 @@ class write_driver_array(design.design):
self.create_write_array()
def create_layout(self):
self.width = self.columns * self.driver.width
if self.bitcell.width > self.driver.width:
self.width = self.columns * self.bitcell.width
else:
self.width = self.columns * self.driver.width
self.height = self.driver.height
self.place_write_array()
@@ -53,6 +58,11 @@ class write_driver_array(design.design):
self.mod_write_driver = getattr(c, OPTS.write_driver)
self.driver = self.mod_write_driver("write_driver")
self.add_mod(self.driver)
c = reload(__import__(OPTS.bitcell))
self.mod_bitcell = getattr(c, OPTS.bitcell)
self.bitcell = self.mod_bitcell()
self.add_mod(self.bitcell)
def create_write_array(self):
self.driver_insts = {}
@@ -69,9 +79,14 @@ class write_driver_array(design.design):
def place_write_array(self):
if self.bitcell.width > self.driver.width:
driver_spacing = self.bitcell.width
else:
driver_spacing = self.driver.width
for i in range(0,self.columns,self.words_per_row):
index = int(i/self.words_per_row)
base = vector(i * self.driver.width,0)
base = vector(i * driver_spacing,0)
self.driver_insts[index].place(base)