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https://github.com/VLSIDA/OpenRAM.git
synced 2026-09-04 00:40:09 +02:00
Moved column mux ff's to be horizontal with wmask flip flops and adjusted wmask AND array en pin location starting point.
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+12
-11
@@ -108,8 +108,12 @@ class sram_1bank(sram_base):
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# Add the col address flops below the bank to the left of the lower-left of bank array
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if self.col_addr_dff:
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col_addr_pos[port] = vector(self.bank.bank_array_ll.x - self.col_addr_dff_insts[port].width - self.bank.m2_gap,
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-max_gap_size - self.col_addr_dff_insts[port].height)
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if self.write_size is not None:
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col_addr_pos[port] = vector(self.bank.bank_array_ll.x - self.col_addr_dff_insts[port].width - self.bank.m2_gap,
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-0.5*max_gap_size - self.col_addr_dff_insts[port].height)
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else:
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col_addr_pos[port] = vector(self.bank.bank_array_ll.x - self.col_addr_dff_insts[port].width - self.bank.m2_gap,
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-max_gap_size - self.col_addr_dff_insts[port].height)
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self.col_addr_dff_insts[port].place(col_addr_pos[port])
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else:
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col_addr_pos[port] = vector(self.bank.bank_array_ll.x,0)
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@@ -125,13 +129,6 @@ class sram_1bank(sram_base):
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y_offset = max(self.control_logic_insts[port].uy(), self.bank_inst.uy() - self.row_addr_dff_insts[port].height)
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row_addr_pos[port] = vector(x_offset, y_offset)
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self.row_addr_dff_insts[port].place(row_addr_pos[port])
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# Add the col address flops below the bank to the left of the lower-left of bank array
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if self.col_addr_dff:
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col_addr_pos[port] = vector(self.bank.bank_array_ll.x - self.col_addr_dff_insts[port].width - self.bank.m2_gap,
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-max_gap_size - self.col_addr_dff_insts[port].height)
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self.col_addr_dff_insts[port].place(col_addr_pos[port])
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if len(self.all_ports)>1:
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# Port 1
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@@ -161,8 +158,12 @@ class sram_1bank(sram_base):
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# Add the col address flops above the bank to the right of the upper-right of bank array
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if self.col_addr_dff:
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col_addr_pos[port] = vector(self.bank.bank_array_ur.x + self.bank.m2_gap,
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self.bank.height + max_gap_size + self.dff.height)
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if self.write_size is not None:
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col_addr_pos[port] = vector(self.bank.bank_array_ur.x + self.bank.m2_gap,
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self.bank.height + 0.5*max_gap_size + self.dff.height)
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else:
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col_addr_pos[port] = vector(self.bank.bank_array_ur.x + self.bank.m2_gap,
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self.bank.height + max_gap_size + self.dff.height)
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self.col_addr_dff_insts[port].place(col_addr_pos[port], mirror="MX")
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else:
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col_addr_pos[port] = self.bank_inst.ur()
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