From f13c8eae8d87a7039026fa3ef7346cebc8fcde9a Mon Sep 17 00:00:00 2001 From: jsowash Date: Thu, 29 Aug 2019 11:07:42 -0700 Subject: [PATCH] Moved column mux ff's to be horizontal with wmask flip flops and adjusted wmask AND array en pin location starting point. --- compiler/modules/write_mask_and_array.py | 4 ++-- compiler/sram/sram_1bank.py | 23 ++++++++++++----------- 2 files changed, 14 insertions(+), 13 deletions(-) diff --git a/compiler/modules/write_mask_and_array.py b/compiler/modules/write_mask_and_array.py index b94934bb..38868832 100644 --- a/compiler/modules/write_mask_and_array.py +++ b/compiler/modules/write_mask_and_array.py @@ -110,8 +110,8 @@ class write_mask_and_array(design.design): end_en_pin = self.and2_insts[self.num_wmasks-1].get_pin("B") self.add_layout_pin(text="en", layer="metal3", - offset=beg_en_pin.ll(), - width = end_en_pin.rx() - beg_en_pin.lx()) + offset=beg_en_pin.bc(), + width = end_en_pin.cx() - beg_en_pin.cx()) for i in range(self.num_wmasks): self.copy_layout_pin(self.and2_insts[i],"A","wmask_in_{0}".format(i)) diff --git a/compiler/sram/sram_1bank.py b/compiler/sram/sram_1bank.py index b93a9b86..95c893ab 100644 --- a/compiler/sram/sram_1bank.py +++ b/compiler/sram/sram_1bank.py @@ -108,8 +108,12 @@ class sram_1bank(sram_base): # Add the col address flops below the bank to the left of the lower-left of bank array if self.col_addr_dff: - col_addr_pos[port] = vector(self.bank.bank_array_ll.x - self.col_addr_dff_insts[port].width - self.bank.m2_gap, - -max_gap_size - self.col_addr_dff_insts[port].height) + if self.write_size is not None: + col_addr_pos[port] = vector(self.bank.bank_array_ll.x - self.col_addr_dff_insts[port].width - self.bank.m2_gap, + -0.5*max_gap_size - self.col_addr_dff_insts[port].height) + else: + col_addr_pos[port] = vector(self.bank.bank_array_ll.x - self.col_addr_dff_insts[port].width - self.bank.m2_gap, + -max_gap_size - self.col_addr_dff_insts[port].height) self.col_addr_dff_insts[port].place(col_addr_pos[port]) else: col_addr_pos[port] = vector(self.bank.bank_array_ll.x,0) @@ -125,13 +129,6 @@ class sram_1bank(sram_base): y_offset = max(self.control_logic_insts[port].uy(), self.bank_inst.uy() - self.row_addr_dff_insts[port].height) row_addr_pos[port] = vector(x_offset, y_offset) self.row_addr_dff_insts[port].place(row_addr_pos[port]) - - # Add the col address flops below the bank to the left of the lower-left of bank array - if self.col_addr_dff: - col_addr_pos[port] = vector(self.bank.bank_array_ll.x - self.col_addr_dff_insts[port].width - self.bank.m2_gap, - -max_gap_size - self.col_addr_dff_insts[port].height) - self.col_addr_dff_insts[port].place(col_addr_pos[port]) - if len(self.all_ports)>1: # Port 1 @@ -161,8 +158,12 @@ class sram_1bank(sram_base): # Add the col address flops above the bank to the right of the upper-right of bank array if self.col_addr_dff: - col_addr_pos[port] = vector(self.bank.bank_array_ur.x + self.bank.m2_gap, - self.bank.height + max_gap_size + self.dff.height) + if self.write_size is not None: + col_addr_pos[port] = vector(self.bank.bank_array_ur.x + self.bank.m2_gap, + self.bank.height + 0.5*max_gap_size + self.dff.height) + else: + col_addr_pos[port] = vector(self.bank.bank_array_ur.x + self.bank.m2_gap, + self.bank.height + max_gap_size + self.dff.height) self.col_addr_dff_insts[port].place(col_addr_pos[port], mirror="MX") else: col_addr_pos[port] = self.bank_inst.ur()