mirror of https://github.com/VLSIDA/OpenRAM.git
Removed array_type from ms_flop_array since it is extraneous code.
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823330a692
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e92cb9ecef
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@ -205,19 +205,16 @@ class bank(design.design):
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self.add_mod(self.decoder)
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self.msf_address = self.mod_ms_flop_array(name="msf_address",
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array_type="address",
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columns=self.row_addr_size+self.col_addr_size,
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word_size=self.row_addr_size+self.col_addr_size)
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self.add_mod(self.msf_address)
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self.msf_data_in = self.mod_ms_flop_array(name="msf_data_in",
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array_type="data_in",
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columns=self.num_cols,
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word_size=self.word_size)
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self.add_mod(self.msf_data_in)
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self.msf_data_out = self.mod_ms_flop_array(name="msf_data_out",
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array_type="data_out",
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columns=self.num_cols,
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word_size=self.word_size)
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self.add_mod(self.msf_data_out)
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@ -60,7 +60,6 @@ class control_logic(design.design):
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self.add_mod(self.nor2)
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self.msf_control = ms_flop_array(name="msf_control",
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array_type="data_in",
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columns=3,
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word_size=3)
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self.add_mod(self.msf_control)
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@ -12,8 +12,7 @@ class ms_flop_array(design.design):
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hierdecoder
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"""
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def __init__(self, name, array_type, columns, word_size):
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self.array_type = array_type
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def __init__(self, name, columns, word_size):
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self.columns = columns
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self.word_size = word_size
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design.design.__init__(self, name)
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@ -51,21 +50,12 @@ class ms_flop_array(design.design):
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self.din_positions = []
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def add_pins(self):
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if (self.array_type == "data_in"):
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pins = {"data_in": 1, "din": "DATA", "dout": "data_in", "dout_bar": "data_in_bar", "clk": "clk"}
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elif (self.array_type == "data_out"):
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pins = {"data_out": 1, "din": "data_out", "dout": "tri_in", "dout_bar": "tri_in_bar", "clk": "sclk"}
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elif (self.array_type == "address"):
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pins = {"address": 1, "din": "ADDR", "dout": "A", "dout_bar": "A_bar", "clk": "addr_clk"}
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self.input_output_pins = pins
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assert(self.array_type in pins), "Invalid input for array_type"
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for i in range(self.word_size):
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self.add_pin(self.input_output_pins["din"] + "[{0}]".format(i))
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self.add_pin("din[{0}]".format(i))
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for i in range(self.word_size):
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self.add_pin(self.input_output_pins["dout"] + "[{0}]".format(i))
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self.add_pin(self.input_output_pins["dout_bar"] + "[{0}]".format(i))
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self.add_pin(self.input_output_pins["clk"])
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self.add_pin("dout[{0}]".format(i))
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self.add_pin("dout_bar[{0}]".format(i))
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self.add_pin("clk")
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self.add_pin("vdd")
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self.add_pin("gnd")
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@ -85,10 +75,10 @@ class ms_flop_array(design.design):
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mod=self.ms_flop,
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offset=[x_off, 0],
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mirror=mirror)
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self.connect_inst([self.input_output_pins["din"] + "[{0}]".format(i),
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self.input_output_pins["dout"] + "[{0}]".format(i),
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self.input_output_pins["dout_bar"] + "[{0}]".format(i),
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self.input_output_pins["clk"],
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self.connect_inst(["din[{0}]".format(i),
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"dout[{0}]".format(i),
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"dout_bar[{0}]".format(i),
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"clk",
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"vdd", "gnd"])
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self.flop_positions.append(vector(x_off, 0))
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@ -100,13 +90,13 @@ class ms_flop_array(design.design):
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self.add_label(text="gnd",
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layer="metal2",
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offset=base + self.ms_flop_chars["gnd"])
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self.add_label(text=self.input_output_pins["din"] + i_str,
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self.add_label(text="din" + i_str,
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layer="metal2",
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offset=base + self.ms_flop_chars["din"])
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self.add_label(text=self.input_output_pins["dout"] + i_str,
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self.add_label(text="dout" + i_str,
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layer="metal2",
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offset=base + self.ms_flop_chars["dout"])
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self.add_label(text=self.input_output_pins["dout_bar"] + i_str,
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self.add_label(text="dout_bar" + i_str,
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layer="metal2",
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offset=base + self.ms_flop_chars["dout_bar"])
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@ -124,13 +114,13 @@ class ms_flop_array(design.design):
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self.add_label(text="gnd",
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layer="metal2",
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offset=gnd_offset)
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self.add_label(text=self.input_output_pins["din"] + i_str,
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self.add_label(text="din" + i_str,
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layer="metal2",
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offset=din_offset)
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self.add_label(text=self.input_output_pins["dout"] + i_str,
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self.add_label(text="dout" + i_str,
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layer="metal2",
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offset=dout_offset)
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self.add_label(text=self.input_output_pins["dout_bar"] + i_str,
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self.add_label(text="dout_bar" + i_str,
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layer="metal2",
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offset=dout_bar_offset)
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@ -144,7 +134,7 @@ class ms_flop_array(design.design):
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offset=[0, self.ms_flop_chars["clk"][1]],
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width=self.width,
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height=-drc["minwidth_metal1"])
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self.add_label(text=self.input_output_pins["clk"],
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self.add_label(text="clk",
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layer="metal1",
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offset=self.ms_flop_chars["clk"])
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self.clk_positions.append(vector(self.ms_flop_chars["clk"]))
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@ -159,10 +149,6 @@ class ms_flop_array(design.design):
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offset=vector(self.ms_flop_chars["vdd"]).scale(0, 1))
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self.vdd_positions.append(vector(self.ms_flop_chars["vdd"]).scale(0, 1))
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self.add_label(text=self.array_type + "ms_flop",
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layer="text",
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offset=[self.width / 2.0,
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self.height / 2.0])
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def delay(self, slope, load=0.0):
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result = self.ms_flop.delay(slope = slope,
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@ -141,7 +141,6 @@ class sram(design.design):
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def create_multibank_modules(self):
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""" Add the multibank address flops and bank decoder """
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self.msf_msb_address = self.mod_ms_flop_array(name="msf_msb_address",
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array_type="address",
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columns=self.num_banks/2,
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word_size=self.num_banks/2)
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self.add_mod(self.msf_msb_address)
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@ -27,7 +27,7 @@ class dff_array_test(unittest.TestCase):
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debug.info(1, "Testing sample for dff_array")
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OPTS.check_lvsdrc = False
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a = ms_flop_array.ms_flop_array(
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name="test1", array_type="address", columns=64, word_size=32)
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name="test1", columns=64, word_size=32)
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OPTS.check_lvsdrc = True
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self.local_check(a)
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@ -130,10 +130,6 @@ class tri_gate_array(design.design):
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self.tri_in_positions.append(pin_offset["in"])
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self.DATA_positions.append(pin_offset["out"])
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self.add_label(text="tri gate",
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layer="text",
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offset=[self.width / 2.0,
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self.height / 2.0])
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def delay(self, slope, load=0.0):
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result = self.tri.delay(slope = slope,
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@ -140,7 +140,3 @@ class write_driver_array(design.design):
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self.vdd_positions.append(base + vector(self.write_driver_chars["vdd"]).scale(0,1))
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self.gnd_positions.append(base + vector(self.write_driver_chars["gnd"]).scale(0,1))
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self.add_label(text="WRITE DRIVER",
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layer="text",
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offset=[self.width / 2.0,
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self.height / 2.0])
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