From e92cb9ecefb5e544d107931403a325e087706ea8 Mon Sep 17 00:00:00 2001 From: mguthaus Date: Mon, 3 Jul 2017 12:08:50 -0700 Subject: [PATCH] Removed array_type from ms_flop_array since it is extraneous code. --- compiler/bank.py | 3 -- compiler/control_logic.py | 1 - compiler/ms_flop_array.py | 46 +++++++++---------------- compiler/sram.py | 1 - compiler/tests/11_ms_flop_array_test.py | 2 +- compiler/tri_gate_array.py | 4 --- compiler/write_driver_array.py | 4 --- 7 files changed, 17 insertions(+), 44 deletions(-) diff --git a/compiler/bank.py b/compiler/bank.py index 59e2ac61..d2193292 100644 --- a/compiler/bank.py +++ b/compiler/bank.py @@ -205,19 +205,16 @@ class bank(design.design): self.add_mod(self.decoder) self.msf_address = self.mod_ms_flop_array(name="msf_address", - array_type="address", columns=self.row_addr_size+self.col_addr_size, word_size=self.row_addr_size+self.col_addr_size) self.add_mod(self.msf_address) self.msf_data_in = self.mod_ms_flop_array(name="msf_data_in", - array_type="data_in", columns=self.num_cols, word_size=self.word_size) self.add_mod(self.msf_data_in) self.msf_data_out = self.mod_ms_flop_array(name="msf_data_out", - array_type="data_out", columns=self.num_cols, word_size=self.word_size) self.add_mod(self.msf_data_out) diff --git a/compiler/control_logic.py b/compiler/control_logic.py index 5d5ca9fb..f5112a2e 100644 --- a/compiler/control_logic.py +++ b/compiler/control_logic.py @@ -60,7 +60,6 @@ class control_logic(design.design): self.add_mod(self.nor2) self.msf_control = ms_flop_array(name="msf_control", - array_type="data_in", columns=3, word_size=3) self.add_mod(self.msf_control) diff --git a/compiler/ms_flop_array.py b/compiler/ms_flop_array.py index 95418227..79a52eab 100644 --- a/compiler/ms_flop_array.py +++ b/compiler/ms_flop_array.py @@ -12,8 +12,7 @@ class ms_flop_array(design.design): hierdecoder """ - def __init__(self, name, array_type, columns, word_size): - self.array_type = array_type + def __init__(self, name, columns, word_size): self.columns = columns self.word_size = word_size design.design.__init__(self, name) @@ -51,21 +50,12 @@ class ms_flop_array(design.design): self.din_positions = [] def add_pins(self): - if (self.array_type == "data_in"): - pins = {"data_in": 1, "din": "DATA", "dout": "data_in", "dout_bar": "data_in_bar", "clk": "clk"} - elif (self.array_type == "data_out"): - pins = {"data_out": 1, "din": "data_out", "dout": "tri_in", "dout_bar": "tri_in_bar", "clk": "sclk"} - elif (self.array_type == "address"): - pins = {"address": 1, "din": "ADDR", "dout": "A", "dout_bar": "A_bar", "clk": "addr_clk"} - self.input_output_pins = pins - assert(self.array_type in pins), "Invalid input for array_type" - for i in range(self.word_size): - self.add_pin(self.input_output_pins["din"] + "[{0}]".format(i)) + self.add_pin("din[{0}]".format(i)) for i in range(self.word_size): - self.add_pin(self.input_output_pins["dout"] + "[{0}]".format(i)) - self.add_pin(self.input_output_pins["dout_bar"] + "[{0}]".format(i)) - self.add_pin(self.input_output_pins["clk"]) + self.add_pin("dout[{0}]".format(i)) + self.add_pin("dout_bar[{0}]".format(i)) + self.add_pin("clk") self.add_pin("vdd") self.add_pin("gnd") @@ -85,10 +75,10 @@ class ms_flop_array(design.design): mod=self.ms_flop, offset=[x_off, 0], mirror=mirror) - self.connect_inst([self.input_output_pins["din"] + "[{0}]".format(i), - self.input_output_pins["dout"] + "[{0}]".format(i), - self.input_output_pins["dout_bar"] + "[{0}]".format(i), - self.input_output_pins["clk"], + self.connect_inst(["din[{0}]".format(i), + "dout[{0}]".format(i), + "dout_bar[{0}]".format(i), + "clk", "vdd", "gnd"]) self.flop_positions.append(vector(x_off, 0)) @@ -100,13 +90,13 @@ class ms_flop_array(design.design): self.add_label(text="gnd", layer="metal2", offset=base + self.ms_flop_chars["gnd"]) - self.add_label(text=self.input_output_pins["din"] + i_str, + self.add_label(text="din" + i_str, layer="metal2", offset=base + self.ms_flop_chars["din"]) - self.add_label(text=self.input_output_pins["dout"] + i_str, + self.add_label(text="dout" + i_str, layer="metal2", offset=base + self.ms_flop_chars["dout"]) - self.add_label(text=self.input_output_pins["dout_bar"] + i_str, + self.add_label(text="dout_bar" + i_str, layer="metal2", offset=base + self.ms_flop_chars["dout_bar"]) @@ -124,13 +114,13 @@ class ms_flop_array(design.design): self.add_label(text="gnd", layer="metal2", offset=gnd_offset) - self.add_label(text=self.input_output_pins["din"] + i_str, + self.add_label(text="din" + i_str, layer="metal2", offset=din_offset) - self.add_label(text=self.input_output_pins["dout"] + i_str, + self.add_label(text="dout" + i_str, layer="metal2", offset=dout_offset) - self.add_label(text=self.input_output_pins["dout_bar"] + i_str, + self.add_label(text="dout_bar" + i_str, layer="metal2", offset=dout_bar_offset) @@ -144,7 +134,7 @@ class ms_flop_array(design.design): offset=[0, self.ms_flop_chars["clk"][1]], width=self.width, height=-drc["minwidth_metal1"]) - self.add_label(text=self.input_output_pins["clk"], + self.add_label(text="clk", layer="metal1", offset=self.ms_flop_chars["clk"]) self.clk_positions.append(vector(self.ms_flop_chars["clk"])) @@ -159,10 +149,6 @@ class ms_flop_array(design.design): offset=vector(self.ms_flop_chars["vdd"]).scale(0, 1)) self.vdd_positions.append(vector(self.ms_flop_chars["vdd"]).scale(0, 1)) - self.add_label(text=self.array_type + "ms_flop", - layer="text", - offset=[self.width / 2.0, - self.height / 2.0]) def delay(self, slope, load=0.0): result = self.ms_flop.delay(slope = slope, diff --git a/compiler/sram.py b/compiler/sram.py index 9145522c..d3c50f68 100644 --- a/compiler/sram.py +++ b/compiler/sram.py @@ -141,7 +141,6 @@ class sram(design.design): def create_multibank_modules(self): """ Add the multibank address flops and bank decoder """ self.msf_msb_address = self.mod_ms_flop_array(name="msf_msb_address", - array_type="address", columns=self.num_banks/2, word_size=self.num_banks/2) self.add_mod(self.msf_msb_address) diff --git a/compiler/tests/11_ms_flop_array_test.py b/compiler/tests/11_ms_flop_array_test.py index 9f282278..027c10f0 100644 --- a/compiler/tests/11_ms_flop_array_test.py +++ b/compiler/tests/11_ms_flop_array_test.py @@ -27,7 +27,7 @@ class dff_array_test(unittest.TestCase): debug.info(1, "Testing sample for dff_array") OPTS.check_lvsdrc = False a = ms_flop_array.ms_flop_array( - name="test1", array_type="address", columns=64, word_size=32) + name="test1", columns=64, word_size=32) OPTS.check_lvsdrc = True self.local_check(a) diff --git a/compiler/tri_gate_array.py b/compiler/tri_gate_array.py index e6fc41e3..8a187ad2 100644 --- a/compiler/tri_gate_array.py +++ b/compiler/tri_gate_array.py @@ -130,10 +130,6 @@ class tri_gate_array(design.design): self.tri_in_positions.append(pin_offset["in"]) self.DATA_positions.append(pin_offset["out"]) - self.add_label(text="tri gate", - layer="text", - offset=[self.width / 2.0, - self.height / 2.0]) def delay(self, slope, load=0.0): result = self.tri.delay(slope = slope, diff --git a/compiler/write_driver_array.py b/compiler/write_driver_array.py index aa1230ca..9dea6459 100644 --- a/compiler/write_driver_array.py +++ b/compiler/write_driver_array.py @@ -140,7 +140,3 @@ class write_driver_array(design.design): self.vdd_positions.append(base + vector(self.write_driver_chars["vdd"]).scale(0,1)) self.gnd_positions.append(base + vector(self.write_driver_chars["gnd"]).scale(0,1)) - self.add_label(text="WRITE DRIVER", - layer="text", - offset=[self.width / 2.0, - self.height / 2.0])