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Incrase space for pnand gates

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mrg
2020-06-09 16:34:15 -07:00
parent c6b875146d
commit e6babc301d
2 changed files with 8 additions and 9 deletions
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compiler/pgates/pnand2.py
+3 -3
View File
@@ -177,9 +177,9 @@ class pnand2(pgate.pgate):
# Top of NMOS drain
nmos_pin = self.nmos2_inst.get_pin("D")
bottom_pin_offset = nmos_pin.uy()
self.inputA_yoffset = bottom_pin_offset + self.m1_pitch
bottom_pin = self.nmos2_inst.get_pin("D")
self.inputA_yoffset = max(bottom_pin.uy() + self.m1_pitch,
self.nmos2_inst.uy() + self.poly_to_active)
self.inputB_yoffset = self.inputA_yoffset + self.m3_pitch
compiler/pgates/pnand3.py
+5 -6
View File
@@ -212,10 +212,9 @@ class pnand3(pgate.pgate):
pmos_drain_bottom = self.pmos1_inst.get_pin("D").by()
self.output_yoffset = pmos_drain_bottom - 0.5 * self.route_layer_width - self.route_layer_space
# This is a more compact offset, but the bottom one works better in the decoders to "center" the pins
# in the height of the gates
self.inputA_yoffset = self.output_yoffset - 0.5 * self.route_layer_width - self.route_layer_space
# self.inputA_yoffset = self.output_yoffset - self.m1_pitch
bottom_pin = self.nmos1_inst.get_pin("D")
self.inputA_yoffset = max(bottom_pin.uy() + self.m1_pitch,
self.nmos1_inst.uy() + self.poly_to_active)
self.route_input_gate(self.pmos1_inst,
self.nmos1_inst,
self.inputA_yoffset,
@@ -223,14 +222,14 @@ class pnand3(pgate.pgate):
position="left")
# Put B right on the well line
self.inputB_yoffset = self.inputA_yoffset - self.m1_pitch
self.inputB_yoffset = self.inputA_yoffset + self.m1_pitch
self.route_input_gate(self.pmos2_inst,
self.nmos2_inst,
self.inputB_yoffset,
"B",
position="center")
self.inputC_yoffset = self.inputB_yoffset - self.m1_pitch
self.inputC_yoffset = self.inputB_yoffset + self.m1_pitch
self.route_input_gate(self.pmos3_inst,
self.nmos3_inst,
self.inputC_yoffset,