Disable virtual connects at top level LVS with Calibre.

compiler/tests/20_sram_1bank_test.py

@@ -23,19 +23,19 @@ class sram_1bank_test(openram_test):
 
         debug.info(1, "Single bank, no column mux with control logic")
         a = sram.sram(word_size=4, num_words=16, num_banks=1, name="sram1")
-        self.local_check(a)
+        self.local_check(a, final_verification=True)
 
         debug.info(1, "Single bank two way column mux with control logic")
         a = sram.sram(word_size=4, num_words=32, num_banks=1, name="sram2")
-        self.local_check(a)
+        self.local_check(a, final_verification=True)
 
         debug.info(1, "Single bank, four way column mux with control logic")
         a = sram.sram(word_size=4, num_words=64, num_banks=1, name="sram3")
-        self.local_check(a)
+        self.local_check(a, final_verification=True)
 
         # debug.info(1, "Single bank, eight way column mux with control logic")
         # a = sram.sram(word_size=2, num_words=128, num_banks=1, name="sram4")
-        # self.local_check(a)
+        # self.local_check(a, final_verification=True)
         
         OPTS.check_lvsdrc = True
         globals.end_openram()

compiler/tests/20_sram_2bank_test.py

@@ -23,19 +23,19 @@ class sram_2bank_test(openram_test):
 
         debug.info(1, "Two bank, no column mux with control logic")
         a = sram.sram(word_size=16, num_words=32, num_banks=2, name="sram1")
-        self.local_check(a)
+        self.local_check(a, final_verification=True)
 
         debug.info(1, "Two bank two way column mux with control logic")
         a = sram.sram(word_size=16, num_words=64, num_banks=2, name="sram2")
-        self.local_check(a)
+        self.local_check(a, final_verification=True)
 
         debug.info(1, "Two bank, four way column mux with control logic")
         a = sram.sram(word_size=16, num_words=128, num_banks=2, name="sram3")
-        self.local_check(a)
+        self.local_check(a, final_verification=True)
 
         # debug.info(1, "Two bank, eight way column mux with control logic")
         # a = sram.sram(word_size=2, num_words=256 num_banks=2, name="sram4")
-        # self.local_check(a)
+        # self.local_check(a, final_verification=True)
 
         OPTS.check_lvsdrc = True
         globals.end_openram()

compiler/tests/20_sram_4bank_test.py

@@ -23,19 +23,19 @@ class sram_4bank_test(openram_test):
 
         debug.info(1, "Four bank, no column mux with control logic")
         a = sram.sram(word_size=16, num_words=64, num_banks=4, name="sram1")
-        self.local_check(a)
+        self.local_check(a, final_verification=True)
 
         debug.info(1, "Four bank two way column mux with control logic")
         a = sram.sram(word_size=16, num_words=128, num_banks=4, name="sram2")
-        self.local_check(a)
+        self.local_check(a, final_verification=True)
 
         debug.info(1, "Four bank, four way column mux with control logic")
         a = sram.sram(word_size=16, num_words=256, num_banks=4, name="sram3")
-        self.local_check(a)
+        self.local_check(a, final_verification=True)
 
         # debug.info(1, "Four bank, eight way column mux with control logic")
         # a = sram.sram(word_size=2, num_words=256, num_banks=4, name="sram4")
-        # self.local_check(a)
+        # self.local_check(a, final_verification=True)
 
         OPTS.check_lvsdrc = True
         globals.end_openram()

compiler/tests/testutils.py

@@ -18,7 +18,7 @@ class openram_test(unittest.TestCase):
         for f in files:
             os.remove(f)        
     
-    def local_check(self, a):
+    def local_check(self, a, final_verification=False):
 
         tempspice = OPTS.openram_temp + "temp.sp"
         tempgds = OPTS.openram_temp + "temp.gds"
@@ -35,7 +35,7 @@ class openram_test(unittest.TestCase):
 
             
         try:
-            self.assertTrue(verify.run_lvs(a.name, tempgds, tempspice)==0)
+            self.assertTrue(verify.run_lvs(a.name, tempgds, tempspice, final_verification)==0)
         except:
             self.reset()
             self.fail("LVS mismatch: {}".format(a.name))