mirror of
https://github.com/VLSIDA/OpenRAM.git
synced 2026-09-07 03:20:39 +02:00
Add custom cell properties to technologies
this is technology specific database to store data about the custom design cells. For now it only contains on which axis the bitcells are mirrored. This is a first step to support thin cells that need to be mirrored on the x and y axis. Signed-off-by: Bastian Koppelmann <[email protected]>
This commit is contained in:
@@ -7,6 +7,7 @@
|
||||
#
|
||||
import debug
|
||||
import design
|
||||
from tech import cell_properties
|
||||
|
||||
class bitcell_base_array(design.design):
|
||||
"""
|
||||
@@ -93,8 +94,7 @@ class bitcell_base_array(design.design):
|
||||
yoffset = 0.0
|
||||
for row in range(self.row_size):
|
||||
name = name_template.format(row, col)
|
||||
|
||||
if (row + row_offset) % 2:
|
||||
if cell_properties.bitcell.mirror.x and (row + row_offset) % 2:
|
||||
tempy = yoffset + self.cell.height
|
||||
dir_key = "MX"
|
||||
else:
|
||||
|
||||
@@ -0,0 +1,28 @@
|
||||
# See LICENSE for licensing information.
|
||||
#
|
||||
# Copyright (c) 2016-2020 Regents of the University of California and The Board
|
||||
# of Regents for the Oklahoma Agricultural and Mechanical College
|
||||
# (acting for and on behalf of Oklahoma State University)
|
||||
# All rights reserved.
|
||||
#
|
||||
|
||||
class _MirrorAxis:
|
||||
def __init__(self, x, y):
|
||||
self.x = x
|
||||
self.y = y
|
||||
|
||||
class _Bitcell:
|
||||
def __init__(self, mirror):
|
||||
self.mirror = mirror
|
||||
|
||||
class CellProperties():
|
||||
"""
|
||||
TODO
|
||||
"""
|
||||
def __init__(self):
|
||||
self.names = {}
|
||||
self._bitcell = _Bitcell(_MirrorAxis(True, False))
|
||||
|
||||
@property
|
||||
def bitcell(self):
|
||||
return self._bitcell
|
||||
@@ -92,7 +92,7 @@ class replica_column(design.design):
|
||||
self.connect_inst(self.get_bitcell_pins(0, row))
|
||||
|
||||
def place_instances(self):
|
||||
|
||||
from tech import cell_properties
|
||||
# Flip the mirrors if we have an odd number of replica+dummy rows at the bottom
|
||||
# so that we will start with mirroring rather than not mirroring
|
||||
rbl_offset = (self.left_rbl+1)%2
|
||||
@@ -100,7 +100,7 @@ class replica_column(design.design):
|
||||
for row in range(self.total_size):
|
||||
name = "bit_r{0}_{1}".format(row,"rbl")
|
||||
offset = vector(0,self.cell.height*(row+(row+rbl_offset)%2))
|
||||
if (row+rbl_offset)%2:
|
||||
if cell_properties.bitcell.mirror.x and (row+rbl_offset)%2:
|
||||
dir_key = "MX"
|
||||
else:
|
||||
dir_key = "R0"
|
||||
|
||||
Reference in New Issue
Block a user