diff --git a/compiler/modules/base_array.py b/compiler/modules/base_array.py
index db2b1be6..40481c59 100644
--- a/compiler/modules/base_array.py
+++ b/compiler/modules/base_array.py
@@ -7,6 +7,7 @@
 #
 import debug
 import design
+from tech import cell_properties
 
 class bitcell_base_array(design.design):
     """
@@ -93,8 +94,7 @@ class bitcell_base_array(design.design):
             yoffset = 0.0
             for row in range(self.row_size):
                 name = name_template.format(row, col)
-
-                if (row + row_offset) % 2:
+                if cell_properties.bitcell.mirror.x and (row + row_offset) % 2:
                     tempy = yoffset + self.cell.height
                     dir_key = "MX"
                 else:
diff --git a/compiler/modules/custom_cell_properties.py b/compiler/modules/custom_cell_properties.py
new file mode 100644
index 00000000..085527fc
--- /dev/null
+++ b/compiler/modules/custom_cell_properties.py
@@ -0,0 +1,28 @@
+# See LICENSE for licensing information.
+#
+# Copyright (c) 2016-2020 Regents of the University of California and The Board
+# of Regents for the Oklahoma Agricultural and Mechanical College
+# (acting for and on behalf of Oklahoma State University)
+# All rights reserved.
+#
+
+class _MirrorAxis:
+    def __init__(self, x, y):
+        self.x = x
+        self.y = y
+
+class _Bitcell:
+    def __init__(self, mirror):
+        self.mirror = mirror
+
+class CellProperties():
+    """
+    TODO
+    """
+    def __init__(self):
+        self.names = {}
+        self._bitcell = _Bitcell(_MirrorAxis(True, False))
+
+    @property
+    def bitcell(self):
+        return self._bitcell
diff --git a/compiler/modules/replica_column.py b/compiler/modules/replica_column.py
index 5552ed55..283787c2 100644
--- a/compiler/modules/replica_column.py
+++ b/compiler/modules/replica_column.py
@@ -92,7 +92,7 @@ class replica_column(design.design):
             self.connect_inst(self.get_bitcell_pins(0, row))
             
     def place_instances(self):
-
+        from tech import cell_properties
         # Flip the mirrors if we have an odd number of replica+dummy rows at the bottom
         # so that we will start with mirroring rather than not mirroring
         rbl_offset = (self.left_rbl+1)%2
@@ -100,7 +100,7 @@ class replica_column(design.design):
         for row in range(self.total_size):
             name = "bit_r{0}_{1}".format(row,"rbl")
             offset = vector(0,self.cell.height*(row+(row+rbl_offset)%2))
-            if (row+rbl_offset)%2:
+            if cell_properties.bitcell.mirror.x and (row+rbl_offset)%2:
                 dir_key = "MX"
             else:
                 dir_key = "R0"
diff --git a/technology/freepdk45/tech/tech.py b/technology/freepdk45/tech/tech.py
index 8b769af9..c21b1f97 100644
--- a/technology/freepdk45/tech/tech.py
+++ b/technology/freepdk45/tech/tech.py
@@ -8,6 +8,7 @@
 import os
 from design_rules import *
 from module_type import *
+from custom_cell_properties import CellProperties
 
 """
 File containing the process technology parameters for FreePDK 45nm.
@@ -24,6 +25,12 @@ File containing the process technology parameters for FreePDK 45nm.
 # For example: tech_modules['contact'] = 'contact_freepdk45'
 tech_modules = ModuleType()
 
+###################################################
+# Custom cell properties
+###################################################
+cell_properties = CellProperties()
+cell_properties.bitcell.mirror.x = True
+cell_properties.bitcell.mirror.y = False
 
 ###################################################
 # GDS file info
diff --git a/technology/scn3me_subm/tech/tech.py b/technology/scn3me_subm/tech/tech.py
index cb476df5..9e6f370b 100755
--- a/technology/scn3me_subm/tech/tech.py
+++ b/technology/scn3me_subm/tech/tech.py
@@ -1,6 +1,7 @@
 import os
 from design_rules import *
 from module_type import *
+from custom_cell_properties import CellProperties
 
 """
 File containing the process technology parameters for SCMOS 3me, subm, 180nm.
@@ -12,6 +13,13 @@ File containing the process technology parameters for SCMOS 3me, subm, 180nm.
 # For example: tech_modules['contact'] = 'contact_scn3me'
 tech_modules = ModuleType()
 
+###################################################
+# Custom cell properties
+###################################################
+cell_properties = CellProperties()
+cell_properties.bitcell.mirror.x = True
+cell_properties.bitcell.mirror.y = False
+
 #GDS file info
 GDS={}
 # gds units
diff --git a/technology/scn4m_subm/tech/tech.py b/technology/scn4m_subm/tech/tech.py
index 3000dc99..ce89e5af 100644
--- a/technology/scn4m_subm/tech/tech.py
+++ b/technology/scn4m_subm/tech/tech.py
@@ -8,6 +8,7 @@
 import os
 from design_rules import *
 from module_type import *
+from custom_cell_properties import CellProperties
 
 """
 File containing the process technology parameters for SCMOS 4m, 0.35um
@@ -24,6 +25,12 @@ File containing the process technology parameters for SCMOS 4m, 0.35um
 # For example: tech_modules['contact'] = 'contact_scn4m'
 tech_modules = ModuleType()
 
+###################################################
+# Custom cell properties
+###################################################
+cell_properties = CellProperties()
+cell_properties.bitcell.mirror.x = True
+cell_properties.bitcell.mirror.y = False
 
 ###################################################
 # GDS file info