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Remove EOL whitespace globally
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@@ -29,7 +29,7 @@ class pbitcell_array_test(openram_test):
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OPTS.num_w_ports = 2
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a = factory.create(module_type="bitcell_array", cols=4, rows=4)
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self.local_check(a)
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debug.info(2, "Testing 4x4 array for multiport bitcell, with write ports at the edge of the bit cell")
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OPTS.bitcell = "pbitcell"
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OPTS.num_rw_ports = 2
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@@ -37,7 +37,7 @@ class pbitcell_array_test(openram_test):
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OPTS.num_w_ports = 2
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a = factory.create(module_type="bitcell_array", cols=4, rows=4)
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self.local_check(a)
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debug.info(2, "Testing 4x4 array for multiport bitcell, with read/write ports at the edge of the bit cell")
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OPTS.bitcell = "pbitcell"
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OPTS.num_rw_ports = 2
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