Add first attempt at code coverage.

This commit is contained in:
Matt Guthaus 2018-11-20 15:12:14 -08:00
parent b8299565eb
commit d6bcba4326
3 changed files with 34 additions and 5 deletions

6
.coveragerc Normal file
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[run]
omit =
# omit anything in a .local directory anywhere
*/.local/*
# omit everything in /usr
/usr/*

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stages:
- test
- analyze
freepdk45:
script: "/home/gitlab-runner/regress_freepdk45.sh"
stage: test
script:
- /home/gitlab-runner/regress_freepdk45.sh
scn4m_subm:
script: "/home/gitlab-runner/regress_scn4m_subm.sh"
stage: test
script:
- /home/gitlab-runner/regress_scn4m_subm.sh
analyze:
stage: analyze
script:
- coverage report -m
artifacts:
paths:
- public
expire_in: 30 days
coverage: '/TOTAL.+ ([0-9]{1,3}%)/'

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# OpenRAM
Master: [![pipeline status](https://scone.soe.ucsc.edu:8888/mrg/PrivateRAM/badges/master/pipeline.svg?private_token=ynB6rSFLzvKUseoBPcwV)](https://github.com/VLSIDA/PrivateRAM/commits/master)
Dev: [![pipeline status](https://scone.soe.ucsc.edu:8888/mrg/PrivateRAM/badges/dev/pipeline.svg?private_token=ynB6rSFLzvKUseoBPcwV)](https://github.com/VLSIDA/PrivateRAM/commits/dev)
[![Download](images/download.svg)](https://github.com/VLSIDA/PrivateRAM/archive/master.zip)
[![License: BSD 3-clause](./images/license_badge.svg)](./LICENSE)
Master: [![pipeline status](https://scone.soe.ucsc.edu:8888/mrg/PrivateRAM/badges/master/pipeline.svg?private_token=ynB6rSFLzvKUseoBPcwV)](https://github.com/VLSIDA/PrivateRAM/commits/master)
[![coverage](https://scone.soe.ucsc.edu:8888/mrg/PrivateRAM/badges/master/coverage.svg?job=coverage)]
[![Download](images/download.svg)](https://github.com/VLSIDA/PrivateRAM/archive/master.zip)
Dev: [![pipeline status](https://scone.soe.ucsc.edu:8888/mrg/PrivateRAM/badges/dev/pipeline.svg?private_token=ynB6rSFLzvKUseoBPcwV)](https://github.com/VLSIDA/PrivateRAM/commits/dev)
[![coverage](https://scone.soe.ucsc.edu:8888/mrg/PrivateRAM/badges/dev/coverage.svg?job=coverage)]
[![Download](images/download.svg)](https://github.com/VLSIDA/PrivateRAM/archive/dev.zip)
An open-source static random access memory (SRAM) compiler.
# What is OpenRAM?