From d6bcba432630220e558507a65df749eaba887132 Mon Sep 17 00:00:00 2001 From: Matt Guthaus Date: Tue, 20 Nov 2018 15:12:14 -0800 Subject: [PATCH] Add first attempt at code coverage. --- .coveragerc | 6 ++++++ .gitlab-ci.yml | 21 +++++++++++++++++++-- README.md | 12 +++++++++--- 3 files changed, 34 insertions(+), 5 deletions(-) create mode 100644 .coveragerc diff --git a/.coveragerc b/.coveragerc new file mode 100644 index 00000000..9b08c31b --- /dev/null +++ b/.coveragerc @@ -0,0 +1,6 @@ +[run] +omit = + # omit anything in a .local directory anywhere + */.local/* + # omit everything in /usr + /usr/* diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 96e30d2d..b1f0a569 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -1,6 +1,23 @@ +stages: + - test + - analyze + freepdk45: - script: "/home/gitlab-runner/regress_freepdk45.sh" + stage: test + script: + - /home/gitlab-runner/regress_freepdk45.sh scn4m_subm: - script: "/home/gitlab-runner/regress_scn4m_subm.sh" + stage: test + script: + - /home/gitlab-runner/regress_scn4m_subm.sh +analyze: + stage: analyze + script: + - coverage report -m + artifacts: + paths: + - public + expire_in: 30 days + coverage: '/TOTAL.+ ([0-9]{1,3}%)/' diff --git a/README.md b/README.md index 91e00bbd..75f8cf75 100644 --- a/README.md +++ b/README.md @@ -1,9 +1,15 @@ # OpenRAM -Master: [![pipeline status](https://scone.soe.ucsc.edu:8888/mrg/PrivateRAM/badges/master/pipeline.svg?private_token=ynB6rSFLzvKUseoBPcwV)](https://github.com/VLSIDA/PrivateRAM/commits/master) -Dev: [![pipeline status](https://scone.soe.ucsc.edu:8888/mrg/PrivateRAM/badges/dev/pipeline.svg?private_token=ynB6rSFLzvKUseoBPcwV)](https://github.com/VLSIDA/PrivateRAM/commits/dev) -[![Download](images/download.svg)](https://github.com/VLSIDA/PrivateRAM/archive/master.zip) + [![License: BSD 3-clause](./images/license_badge.svg)](./LICENSE) +Master: [![pipeline status](https://scone.soe.ucsc.edu:8888/mrg/PrivateRAM/badges/master/pipeline.svg?private_token=ynB6rSFLzvKUseoBPcwV)](https://github.com/VLSIDA/PrivateRAM/commits/master) +[![coverage](https://scone.soe.ucsc.edu:8888/mrg/PrivateRAM/badges/master/coverage.svg?job=coverage)] +[![Download](images/download.svg)](https://github.com/VLSIDA/PrivateRAM/archive/master.zip) + +Dev: [![pipeline status](https://scone.soe.ucsc.edu:8888/mrg/PrivateRAM/badges/dev/pipeline.svg?private_token=ynB6rSFLzvKUseoBPcwV)](https://github.com/VLSIDA/PrivateRAM/commits/dev) +[![coverage](https://scone.soe.ucsc.edu:8888/mrg/PrivateRAM/badges/dev/coverage.svg?job=coverage)] +[![Download](images/download.svg)](https://github.com/VLSIDA/PrivateRAM/archive/dev.zip) + An open-source static random access memory (SRAM) compiler. # What is OpenRAM?