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Add new option to enable inline checks at each level of hierarchy. Default is off.

This commit is contained in:
Matt Guthaus 2018-11-13 16:51:19 -08:00
parent 01ceedb348
commit ce74827f24
3 changed files with 17 additions and 10 deletions
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12
compiler/base/hierarchy_design.py
View File

@ -69,31 +69,31 @@ class hierarchy_design(hierarchy_spice.spice, hierarchy_layout.layout):
"""Checks both DRC and LVS for a module"""
# Unit tests will check themselves.
# Do not run if disabled in options.
if not OPTS.is_unit_test and OPTS.check_lvsdrc:
if (not OPTS.is_unit_test and OPTS.check_lvsdrc and OPTS.inline_lvsdrc) or final_verification:
tempspice = OPTS.openram_temp + "/temp.sp"
tempgds = OPTS.openram_temp + "/temp.gds"
self.sp_write(tempspice)
self.gds_write(tempgds)
debug.check(verify.run_drc(self.name, tempgds) == 0,"DRC failed for {0}".format(self.name))
debug.check(verify.run_drc(self.name, tempgds, final_verification) == 0,"DRC failed for {0}".format(self.name))
debug.check(verify.run_lvs(self.name, tempgds, tempspice, final_verification) == 0,"LVS failed for {0}".format(self.name))
os.remove(tempspice)
os.remove(tempgds)
def DRC(self):
def DRC(self, final_verification=False):
"""Checks DRC for a module"""
# Unit tests will check themselves.
# Do not run if disabled in options.
if not OPTS.is_unit_test and OPTS.check_lvsdrc:
if (not OPTS.is_unit_test and OPTS.check_lvsdrc and OPTS.inline_lvsdrc) or final_verification:
tempgds = OPTS.openram_temp + "/temp.gds"
self.gds_write(tempgds)
debug.check(verify.run_drc(self.name, tempgds) == 0,"DRC failed for {0}".format(self.name))
debug.check(verify.run_drc(self.name, tempgds, final_verification) == 0,"DRC failed for {0}".format(self.name))
os.remove(tempgds)
def LVS(self, final_verification=False):
"""Checks LVS for a module"""
# Unit tests will check themselves.
# Do not run if disabled in options.
if not OPTS.is_unit_test and OPTS.check_lvsdrc:
if (not OPTS.is_unit_test and OPTS.check_lvsdrc and OPTS.inline_lvsdrc) or final_verification:
tempspice = OPTS.openram_temp + "/temp.sp"
tempgds = OPTS.openram_temp + "/temp.gds"
self.sp_write(tempspice)

11
compiler/globals.py
View File

@ -30,8 +30,10 @@ def parse_args():
help="Base output file name(s) prefix", metavar="FILE"),
optparse.make_option("-p", "--outpath", dest="output_path",
help="Output file(s) location"),
optparse.make_option("-i", "--inlinecheck", action="store_true",
help="Enable inline LVS/DRC checks", dest="inline_lvsdrc"),
optparse.make_option("-n", "--nocheck", action="store_false",
help="Disable inline LVS/DRC checks", dest="check_lvsdrc"),
help="Disable all LVS/DRC checks", dest="check_lvsdrc"),
optparse.make_option("-v", "--verbose", action="count", dest="debug_level",
help="Increase the verbosity level"),
optparse.make_option("-t", "--tech", dest="tech_name",
@ -413,6 +415,9 @@ def report_status():
if OPTS.netlist_only:
print("Netlist only mode (no physical design is being done).")
if not OPTS.inline_lvsdrc:
print("DRC/LVS/PEX is only run on the top-level design.")
if not OPTS.check_lvsdrc:
print("DRC/LVS/PEX checking is disabled.")
print("DRC/LVS/PEX is completely disabled.")

4
compiler/options.py
View File

@ -20,8 +20,10 @@ class options(optparse.Values):
debug_level = 0
# When enabled, layout is not generated (and no DRC or LVS are performed)
netlist_only = False
# This determines whether LVS and DRC is checked for each submodule.
# This determines whether LVS and DRC is checked at all.
check_lvsdrc = True
# This determines whether LVS and DRC is checked for every submodule.
inline_lvsdrc = False
# Variable to select the variant of spice
spice_name = ""
# The spice executable being used which is derived from the user PATH.