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Fix some regression fails.

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Matt Guthaus
2019-07-25 14:18:08 -07:00
parent 0bb41b8a5d
commit c8c4d05bba
6 changed files with 63 additions and 68 deletions
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compiler/modules/replica_bitcell_array.py
+2 -2
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@@ -393,7 +393,7 @@ class replica_bitcell_array(design.design):
# Dynamic Power from Bitline
bl_wire = self.gen_bl_wire()
cell_load = 2 * bl_wire.return_input_cap()
bl_swing = parameter["rbl_height_percentage"]
bl_swing = OPTS.rbl_delay_percentage
freq = spice["default_event_rate"]
bitline_dynamic = self.calc_dynamic_power(corner, cell_load, freq, swing=bl_swing)
@@ -451,4 +451,4 @@ class replica_bitcell_array(design.design):
def get_cell_name(self, inst_name, row, col):
"""Gets the spice name of the target bitcell."""
return self.bitcell_array.get_cell_name(inst_name+'.x'+self.bitcell_array_inst.name, row, col)
return self.bitcell_array.get_cell_name(inst_name+'.x'+self.bitcell_array_inst.name, row, col)