Use fake sram in memchar

This commit is contained in:
Bugra Onal
2022-08-10 12:22:47 -07:00
parent ae107b635f
commit c7975e3274
4 changed files with 68 additions and 6 deletions
+5
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@@ -0,0 +1,5 @@
BSIM3V3.1 Parameter Check
Model = p
W = 6e-07, L = 8e-07
Warning: Pd = 0 is less than W.
Warning: Ps = 0 is less than W.
+59
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@@ -0,0 +1,59 @@
ERROR: file testutils.py: line 266: Mismatching files:
file1=/tmp/openram_bugra_979_temp//sram_2_16_1_scn4m_subm_TT_5p0V_25C.lib
file2=/openram/compiler/tests/golden/sram_2_16_1_scn4m_subm_TT_5p0V_25C_analytical.lib
ERROR: file testutils.py: line 268: MISMATCH Line (74):
type (wmask){
!=
cell (sram____scnm_subm){
ERROR: file testutils.py: line 268: MISMATCH Line (75):
base_type : array;
!=
memory(){
ERROR: file testutils.py: line 268: MISMATCH Line (76):
data_type : bit;
!=
type : ram;
ERROR: file testutils.py: line 268: MISMATCH Line (77):
bit_width : ;
!=
address_width : ;
ERROR: file testutils.py: line 268: MISMATCH Line (78):
bit_from : ;
!=
word_width : ;
ERROR: file testutils.py: line 268: MISMATCH Line (79):
bit_to : ;
!=
}
ERROR: file testutils.py: line 268: MISMATCH Line (80):
}
!=
interface_timing : true;
ERROR: file testutils.py: line 268: MISMATCH Line (81):
!=
dont_use : true;
ERROR: file testutils.py: line 268: MISMATCH Line (82):
cell (sram____scnm_subm){
!=
map_only : true;
ERROR: file testutils.py: line 268: MISMATCH Line (83):
memory(){
!=
dont_touch : true;
ERROR: file testutils.py: line 268: MISMATCH Line (84):
type : ram;
!=
area : ;