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OpenRAM
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Disable power routing on some freepdk45 tests for issue 36

This commit is contained in:
mrg 2023-02-17 17:00:04 -08:00
parent 1b711ed7d7
commit c07268d297
8 changed files with 24 additions and 0 deletions
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3
compiler/tests/20_sram_1bank_2mux_1rw_1r_spare_cols_test.py
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@ -23,6 +23,9 @@ class sram_1bank_2mux_1rw_1r_spare_cols_test(openram_test):
openram.init_openram(config_file, is_unit_test=True)
from openram import sram_config
if OPTS.tech_name == "freepdk45":
OPTS.route_supplies = False
OPTS.num_rw_ports = 1
OPTS.num_r_ports = 1
OPTS.num_w_ports = 0

3
compiler/tests/20_sram_1bank_2mux_1w_1r_spare_cols_test.py
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@ -23,6 +23,9 @@ class sram_1bank_2mux_1w_1r_spare_cols_test(openram_test):
openram.init_openram(config_file, is_unit_test=True)
from openram import sram_config
if OPTS.tech_name == "freepdk45":
OPTS.route_supplies = False
OPTS.num_rw_ports = 0
OPTS.num_w_ports = 1
OPTS.num_r_ports = 1

3
compiler/tests/20_sram_1bank_2mux_global_test.py
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@ -31,6 +31,9 @@ class sram_1bank_2mux_global_test(openram_test):
num_spare_rows = 0
num_spare_cols = 0
if OPTS.tech_name == "freepdk45":
OPTS.route_supplies = False
c = sram_config(word_size=8,
num_words=32,
num_banks=1,

3
compiler/tests/20_sram_1bank_2mux_wmask_spare_cols_test.py
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@ -30,6 +30,9 @@ class sram_1bank_2mux_wmask_spare_cols_test(openram_test):
num_spare_rows = 0
num_spare_cols = 0
if OPTS.tech_name == "freepdk45":
OPTS.route_supplies = False
c = sram_config(word_size=8,
write_size=4,
num_words=64,

3
compiler/tests/20_sram_1bank_2mux_wmask_test.py
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@ -30,6 +30,9 @@ class sram_1bank_2mux_wmask_test(openram_test):
num_spare_rows = 0
num_spare_cols = 0
if OPTS.tech_name == "freepdk45":
OPTS.route_supplies = False
c = sram_config(word_size=8,
write_size=4,
num_words=64,

3
compiler/tests/20_sram_1bank_4mux_1rw_1r_test.py
View File

@ -23,6 +23,9 @@ class sram_1bank_4mux_1rw_1r_test(openram_test):
openram.init_openram(config_file, is_unit_test=True)
from openram import sram_config
if OPTS.tech_name == "freepdk45":
OPTS.route_supplies = False
OPTS.num_rw_ports = 1
OPTS.num_r_ports = 1
OPTS.num_w_ports = 0

3
compiler/tests/20_sram_1bank_4mux_test.py
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@ -30,6 +30,9 @@ class sram_1bank_4mux_test(openram_test):
num_spare_rows = 0
num_spare_cols = 0
if OPTS.tech_name == "freepdk45":
OPTS.route_supplies = False
c = sram_config(word_size=4,
num_words=64,
num_banks=1,

3
compiler/tests/20_sram_1bank_8mux_1rw_1r_test.py
View File

@ -23,6 +23,9 @@ class sram_1bank_8mux_1rw_1r_test(openram_test):
openram.init_openram(config_file, is_unit_test=True)
from openram import sram_config
if OPTS.tech_name == "freepdk45":
OPTS.route_supplies = False
OPTS.num_rw_ports = 1
OPTS.num_r_ports = 1
OPTS.num_w_ports = 0