diff --git a/compiler/tests/20_sram_1bank_2mux_1rw_1r_spare_cols_test.py b/compiler/tests/20_sram_1bank_2mux_1rw_1r_spare_cols_test.py index 71d4a3eb..704204dd 100755 --- a/compiler/tests/20_sram_1bank_2mux_1rw_1r_spare_cols_test.py +++ b/compiler/tests/20_sram_1bank_2mux_1rw_1r_spare_cols_test.py @@ -23,6 +23,9 @@ class sram_1bank_2mux_1rw_1r_spare_cols_test(openram_test): openram.init_openram(config_file, is_unit_test=True) from openram import sram_config + if OPTS.tech_name == "freepdk45": + OPTS.route_supplies = False + OPTS.num_rw_ports = 1 OPTS.num_r_ports = 1 OPTS.num_w_ports = 0 diff --git a/compiler/tests/20_sram_1bank_2mux_1w_1r_spare_cols_test.py b/compiler/tests/20_sram_1bank_2mux_1w_1r_spare_cols_test.py index ce3fef2a..ae5ee11b 100755 --- a/compiler/tests/20_sram_1bank_2mux_1w_1r_spare_cols_test.py +++ b/compiler/tests/20_sram_1bank_2mux_1w_1r_spare_cols_test.py @@ -23,6 +23,9 @@ class sram_1bank_2mux_1w_1r_spare_cols_test(openram_test): openram.init_openram(config_file, is_unit_test=True) from openram import sram_config + if OPTS.tech_name == "freepdk45": + OPTS.route_supplies = False + OPTS.num_rw_ports = 0 OPTS.num_w_ports = 1 OPTS.num_r_ports = 1 diff --git a/compiler/tests/20_sram_1bank_2mux_global_test.py b/compiler/tests/20_sram_1bank_2mux_global_test.py index 01d831ee..f8b73aca 100755 --- a/compiler/tests/20_sram_1bank_2mux_global_test.py +++ b/compiler/tests/20_sram_1bank_2mux_global_test.py @@ -31,6 +31,9 @@ class sram_1bank_2mux_global_test(openram_test): num_spare_rows = 0 num_spare_cols = 0 + if OPTS.tech_name == "freepdk45": + OPTS.route_supplies = False + c = sram_config(word_size=8, num_words=32, num_banks=1, diff --git a/compiler/tests/20_sram_1bank_2mux_wmask_spare_cols_test.py b/compiler/tests/20_sram_1bank_2mux_wmask_spare_cols_test.py index 0f8a1d7f..419390a5 100755 --- a/compiler/tests/20_sram_1bank_2mux_wmask_spare_cols_test.py +++ b/compiler/tests/20_sram_1bank_2mux_wmask_spare_cols_test.py @@ -30,6 +30,9 @@ class sram_1bank_2mux_wmask_spare_cols_test(openram_test): num_spare_rows = 0 num_spare_cols = 0 + if OPTS.tech_name == "freepdk45": + OPTS.route_supplies = False + c = sram_config(word_size=8, write_size=4, num_words=64, diff --git a/compiler/tests/20_sram_1bank_2mux_wmask_test.py b/compiler/tests/20_sram_1bank_2mux_wmask_test.py index cc3c2322..05d89040 100755 --- a/compiler/tests/20_sram_1bank_2mux_wmask_test.py +++ b/compiler/tests/20_sram_1bank_2mux_wmask_test.py @@ -30,6 +30,9 @@ class sram_1bank_2mux_wmask_test(openram_test): num_spare_rows = 0 num_spare_cols = 0 + if OPTS.tech_name == "freepdk45": + OPTS.route_supplies = False + c = sram_config(word_size=8, write_size=4, num_words=64, diff --git a/compiler/tests/20_sram_1bank_4mux_1rw_1r_test.py b/compiler/tests/20_sram_1bank_4mux_1rw_1r_test.py index ffe7a673..1ab0d745 100755 --- a/compiler/tests/20_sram_1bank_4mux_1rw_1r_test.py +++ b/compiler/tests/20_sram_1bank_4mux_1rw_1r_test.py @@ -23,6 +23,9 @@ class sram_1bank_4mux_1rw_1r_test(openram_test): openram.init_openram(config_file, is_unit_test=True) from openram import sram_config + if OPTS.tech_name == "freepdk45": + OPTS.route_supplies = False + OPTS.num_rw_ports = 1 OPTS.num_r_ports = 1 OPTS.num_w_ports = 0 diff --git a/compiler/tests/20_sram_1bank_4mux_test.py b/compiler/tests/20_sram_1bank_4mux_test.py index 3f1f0886..15f9f31d 100755 --- a/compiler/tests/20_sram_1bank_4mux_test.py +++ b/compiler/tests/20_sram_1bank_4mux_test.py @@ -30,6 +30,9 @@ class sram_1bank_4mux_test(openram_test): num_spare_rows = 0 num_spare_cols = 0 + if OPTS.tech_name == "freepdk45": + OPTS.route_supplies = False + c = sram_config(word_size=4, num_words=64, num_banks=1, diff --git a/compiler/tests/20_sram_1bank_8mux_1rw_1r_test.py b/compiler/tests/20_sram_1bank_8mux_1rw_1r_test.py index c95fec84..7ce6ca8d 100755 --- a/compiler/tests/20_sram_1bank_8mux_1rw_1r_test.py +++ b/compiler/tests/20_sram_1bank_8mux_1rw_1r_test.py @@ -23,6 +23,9 @@ class sram_1bank_8mux_1rw_1r_test(openram_test): openram.init_openram(config_file, is_unit_test=True) from openram import sram_config + if OPTS.tech_name == "freepdk45": + OPTS.route_supplies = False + OPTS.num_rw_ports = 1 OPTS.num_r_ports = 1 OPTS.num_w_ports = 0