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Add layer and directions to pbitcell

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This commit is contained in:
mrg
2022-05-16 16:11:13 -07:00
parent 4be075e586
commit bdd334bce9
3 changed files with 18 additions and 2 deletions
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compiler/modules/replica_bitcell_array.py
+5 -1
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@@ -6,6 +6,7 @@
import debug
from bitcell_base_array import bitcell_base_array
from pbitcell import pbitcell
from contact import contact
from tech import drc, spice, preferred_directions
from tech import cell_properties as props
@@ -490,7 +491,10 @@ class replica_bitcell_array(bitcell_base_array):
def route_supplies(self):
bitcell = getattr(props, "bitcell_{}port".format(OPTS.num_ports))
if OPTS.bitcell == "pbitcell":
bitcell = factory.create(module_type="pbitcell")
else:
bitcell = getattr(props, "bitcell_{}port".format(OPTS.num_ports))
wl_layer = bitcell.wl_layer
wl_dir = bitcell.wl_dir