Merge use-temp-dir-pid

compiler/tests/01_library_drc_test.py

@@ -33,7 +33,7 @@ class library_drc_test(unittest.TestCase):
 
         # fails if there are any DRC errors on any cells
         self.assertEqual(drc_errors, 0)
-
+        globals.end_openram()
 
 def setup_files():
     gds_dir = OPTS.openram_tech + "/gds_lib"

compiler/tests/02_library_lvs_test.py

@@ -37,7 +37,7 @@ class library_lvs_test(unittest.TestCase):
 
         # fail if the error count is not zero
         self.assertEqual(lvs_errors, 0)
-
+        globals.end_openram()
 
 def setup_files():
     gds_dir = OPTS.openram_tech + "/gds_lib"

compiler/tests/03_contact_test.py

@@ -54,7 +54,8 @@ class contact_test(unittest.TestCase):
             self.local_check(c)
 
         OPTS.check_lvsdrc = True
-
+        globals.end_openram()
+        
     def local_check(self, c):
         tempgds = OPTS.openram_temp + "temp.gds"
         c.gds_write(tempgds)

compiler/tests/03_path_test.py

@@ -75,7 +75,8 @@ class path_test(unittest.TestCase):
 
         # return it back to it's normal state
         OPTS.check_lvsdrc = True
-
+        globals.end_openram()
+        
     def local_check(self, w):
         tempgds = OPTS.openram_temp + "temp.gds"
         w.gds_write(tempgds)

compiler/tests/03_ptx_1finger_nmos_test.py

@@ -33,7 +33,7 @@ class ptx_test(unittest.TestCase):
         OPTS.check_lvsdrc = True
 
         self.local_check(fet)
-
+        globals.end_openram()
 
 
     def add_mods(self, fet):

compiler/tests/03_ptx_1finger_pmos_test.py

@@ -33,7 +33,7 @@ class ptx_test(unittest.TestCase):
         OPTS.check_lvsdrc = True
 
         self.local_check(fet)
-
+        globals.end_openram()
 
 
     def add_mods(self, fet):

compiler/tests/03_ptx_3finger_nmos_test.py

@@ -33,7 +33,7 @@ class ptx_test(unittest.TestCase):
         OPTS.check_lvsdrc = True
 
         self.local_check(fet)
-
+        globals.end_openram()
 
     def add_mods(self, fet):
         self.create_contacts()

compiler/tests/03_ptx_3finger_pmos_test.py

@@ -33,7 +33,8 @@ class ptx_test(unittest.TestCase):
         OPTS.check_lvsdrc = True
 
         self.local_check(fet)
-
+        globals.end_openram()
+        
     def add_mods(self, fet):
         self.create_contacts()
         self.add_well_extension(fet)

compiler/tests/03_wire_test.py

@@ -128,7 +128,8 @@ class wire_test(unittest.TestCase):
 
         # return it back to it's normal state
         OPTS.check_lvsdrc = True
-
+        globals.end_openram()
+        
     def local_check(self, w):
         tempgds = OPTS.openram_temp + "temp.gds"
         w.gds_write(tempgds)

compiler/tests/04_nand_2_test.py

@@ -33,7 +33,8 @@ class nand_2_test(unittest.TestCase):
         tx = nand_2.nand_2(name="a_nand_1", nmos_width=2 * tech.drc["minwidth_tx"])
         OPTS.check_lvsdrc = True
         self.local_check(tx)
-
+        globals.end_openram()
+        
 
     def local_check(self, tx):
         tempspice = OPTS.openram_temp + "temp.sp"

compiler/tests/04_nand_3_test.py

@@ -31,7 +31,8 @@ class nand_3_test(unittest.TestCase):
 
         OPTS.check_lvsdrc = True
         self.local_check(tx)
-
+        globals.end_openram()
+        
     def local_check(self, tx):
         tempspice = OPTS.openram_temp + "temp.sp"
         tempgds = OPTS.openram_temp + "temp.gds"

compiler/tests/04_nor_2_test.py

@@ -32,7 +32,7 @@ class nor_2_test(unittest.TestCase):
         tx = nor_2.nor_2(name="a_nor_1", nmos_width=2 * tech.drc["minwidth_tx"])
         OPTS.check_lvsdrc = True
         self.local_check(tx)
-
+        globals.end_openram()
 
     def local_check(self, tx):
         tempspice = OPTS.openram_temp + "temp.sp"

compiler/tests/04_pinv_test.py

@@ -42,6 +42,7 @@ class pinv_test(unittest.TestCase):
         OPTS.check_lvsdrc = True
         self.local_check(tx)
 
+        globals.end_openram()        
 
     def local_check(self, tx):
         tempspice = OPTS.openram_temp + "temp.sp"

compiler/tests/04_wordline_driver_test.py

@@ -33,7 +33,7 @@ class wordline_driver_test(unittest.TestCase):
         OPTS.check_lvsdrc = True
 
         self.local_check(tx)
-
+        globals.end_openram()
     def local_check(self, tx):
         tempspice = OPTS.openram_temp + "temp.sp"
         tempgds = OPTS.openram_temp + "temp.gds"

compiler/tests/05_bitcell_array_test.py

@@ -31,7 +31,7 @@ class array_test(unittest.TestCase):
         OPTS.check_lvsdrc = True
 
         self.local_check(a)
-
+        globals.end_openram()
 
     def local_check(self, a):
         tempspice = OPTS.openram_temp + "temp.sp"

compiler/tests/06_hierarchical_decoder_test.py

@@ -57,7 +57,8 @@ class hierarchical_decoder_test(unittest.TestCase):
         OPTS.check_lvsdrc = True
         self.local_check(a)
 
-
+        globals.end_openram()
+        
     def local_check(self, a):
         tempspice = OPTS.openram_temp + "temp.sp"
         tempgds = OPTS.openram_temp + "temp.gds"

compiler/tests/06_hierarchical_predecode2x4_test.py

@@ -30,7 +30,8 @@ class hierarchical_predecode2x4_test(unittest.TestCase):
         OPTS.check_lvsdrc = True
         self.local_check(a)
 
-
+        globals.end_openram()
+        
     def local_check(self, a):
         tempspice = OPTS.openram_temp + "temp.sp"
         tempgds = OPTS.openram_temp + "temp.gds"

compiler/tests/06_hierarchical_predecode3x8_test.py

@@ -30,6 +30,7 @@ class hierarchical_predecode3x8_test(unittest.TestCase):
         OPTS.check_lvsdrc = True
         self.local_check(a)
 
+        globals.end_openram()
 
     def local_check(self, a):
         tempspice = OPTS.openram_temp + "temp.sp"

compiler/tests/07_single_level_column_mux_test.py

@@ -28,7 +28,8 @@ class single_level_column_mux_test(unittest.TestCase):
             rows=32, columns=32, word_size=16)
         OPTS.check_lvsdrc = True
         self.local_check(a)
-
+        globals.end_openram()
+        
     def local_check(self, a):
         tempspice = OPTS.openram_temp + "temp.sp"
         tempgds = OPTS.openram_temp + "temp.gds"

compiler/tests/08_precharge_array_test.py

@@ -38,7 +38,8 @@ class precharge_test(unittest.TestCase):
         OPTS.check_lvsdrc = True
         self.local_check(pc)
 
-
+        globals.end_openram()
+        
     def local_check(self, pc):
         tempspice = OPTS.openram_temp + "temp.sp"
         tempgds = OPTS.openram_temp + "temp.gds"

compiler/tests/09_sense_amp_array_test.py

@@ -41,7 +41,8 @@ class sense_amp_test(unittest.TestCase):
         OPTS.check_lvsdrc = True
         self.local_check(a)
 
-
+        globals.end_openram()
+        
     def local_check(self, a):
         tempspice = OPTS.openram_temp + "temp.sp"
         tempgds = OPTS.openram_temp + "temp.gds"

compiler/tests/10_write_driver_array_test.py

@@ -35,6 +35,7 @@ class write_driver_test(unittest.TestCase):
         OPTS.check_lvsdrc = True
         self.local_check(a)
 
+        globals.end_openram()
 
     def local_check(self, a):
         tempspice = OPTS.openram_temp + "temp.sp"

compiler/tests/11_ms_flop_array_test.py

@@ -31,6 +31,7 @@ class dff_array_test(unittest.TestCase):
         OPTS.check_lvsdrc = True
         self.local_check(a)
 
+        globals.end_openram()
 
     def local_check(self, a):
         tempspice = OPTS.openram_temp + "temp.sp"

compiler/tests/13_control_logic_test.py

@@ -29,7 +29,8 @@ class control_logic_test(unittest.TestCase):
         OPTS.check_lvsdrc = True
         self.local_check(a)
 
-
+        globals.end_openram()
+        
     def local_check(self, a):
         tempspice = OPTS.openram_temp + "temp.sp"
         tempgds = OPTS.openram_temp + "temp.gds"

compiler/tests/14_logic_effort_dc_test.py

@@ -31,6 +31,8 @@ class logic_effort_dc_test(unittest.TestCase):
         OPTS.check_lvsdrc = True
         self.local_check(a)
 
+        globals.end_openram()
+        
     def local_check(self, a):
         tempspice = OPTS.openram_temp + "temp.sp"
         tempgds = OPTS.openram_temp + "temp.gds"

compiler/tests/15_tri_gate_array_test.py

@@ -28,6 +28,8 @@ class tri_gate_array_test(unittest.TestCase):
         OPTS.check_lvsdrc = True
         self.local_check(a)
 
+        globals.end_openram()
+        
     def local_check(self, a):
         tempspice = OPTS.openram_temp + "temp.sp"
         tempgds = OPTS.openram_temp + "temp.gds"

compiler/tests/16_replica_bitline_test.py

@@ -31,6 +31,8 @@ class replica_bitline_test(unittest.TestCase):
         OPTS.check_lvsdrc = True
         self.local_check(a)
 
+        globals.end_openram()
+        
     def local_check(self, a):
         tempspice = OPTS.openram_temp + "temp.sp"
         tempgds = OPTS.openram_temp + "temp.gds"

compiler/tests/19_bank_test.py

@@ -35,6 +35,8 @@ class bank_test(unittest.TestCase):
         OPTS.check_lvsdrc = True
         self.local_check(a)
 
+        globals.end_openram()
+        
     def local_check(self, a):
         tempspice = OPTS.openram_temp + "temp.sp"
         tempgds = OPTS.openram_temp + "temp.gds"

compiler/tests/20_sram_1bank_test.py

@@ -30,7 +30,8 @@ class sram_1bank_test(unittest.TestCase):
         OPTS.check_lvsdrc = True
         self.local_check(a)
 
-
+        globals.end_openram()
+        
     def local_check(self, a):
         tempspice = OPTS.openram_temp + "temp.sp"
         tempgds = OPTS.openram_temp + "temp.gds"

compiler/tests/20_sram_2bank_test.py

@@ -30,6 +30,8 @@ class sram_2bank_test(unittest.TestCase):
         OPTS.check_lvsdrc = True
         self.local_check(a)
 
+        globals.end_openram()
+        
     def local_check(self, a):
         tempspice = OPTS.openram_temp + "temp.sp"
         tempgds = OPTS.openram_temp + "temp.gds"

compiler/tests/20_sram_4bank_test.py

@@ -30,6 +30,8 @@ class sram_4bank_test(unittest.TestCase):
         OPTS.check_lvsdrc = True
         self.local_check(a)
 
+        globals.end_openram()
+        
     def local_check(self, a):
         tempspice = OPTS.openram_temp + "temp.sp"
         tempgds = OPTS.openram_temp + "temp.gds"

compiler/tests/21_hspice_delay_test.py

@@ -63,8 +63,9 @@ class timing_sram_test(unittest.TestCase):
             self.assertTrue(False) # other techs fail
 
         os.remove(tempspice)
-           
 
+        globals.end_openram()
+        
 # instantiate a copdsay of the class to actually run the test
 if __name__ == "__main__":
     (OPTS, args) = globals.parse_args()

compiler/tests/21_hspice_hold_test.py

@@ -44,6 +44,7 @@ class timing_setup_test(unittest.TestCase):
         else:
             self.assertTrue(False) # other techs fail
 
+        globals.end_openram()
 
 # instantiate a copdsay of the class to actually run the test
 if __name__ == "__main__":

compiler/tests/21_hspice_setup_test.py

@@ -44,6 +44,8 @@ class timing_setup_test(unittest.TestCase):
         else:
             self.assertTrue(False) # other techs fail
 
+        globals.end_openram()
+        
 # instantiate a copdsay of the class to actually run the test
 if __name__ == "__main__":
     (OPTS, args) = globals.parse_args()

compiler/tests/22_pex_func_test_with_pinv.py

@@ -24,6 +24,8 @@ class sram_func_test(unittest.TestCase):
         self.func_test(bank_num=2)
         self.func_test(bank_num=4)
 
+        globals.end_openram()
+        
     def func_test(self, bank_num):
 
         import sram

compiler/tests/22_sram_func_test.py

@@ -51,6 +51,8 @@ class sram_func_test(unittest.TestCase):
 
         os.remove(tempspice)
 
+        globals.end_openram()
+        
 # instantiate a copdsay of the class to actually run the test
 if __name__ == "__main__":
     (OPTS, args) = globals.parse_args()

compiler/tests/23_lib_sram_test.py

@@ -47,7 +47,7 @@ class lib_test(unittest.TestCase):
 
         os.system("rm {0}".format(libname))
 
-
+        globals.end_openram()
 
 # instantiate a copdsay of the class to actually run the test
 if __name__ == "__main__":

compiler/tests/24_lef_sram_test.py

@@ -47,7 +47,7 @@ class lef_test(unittest.TestCase):
         os.system("rm {0}".format(gdsname))
         os.system("rm {0}".format(lefname))
 
-
+        globals.end_openram()
 
 # instantiate a copdsay of the class to actually run the test
 if __name__ == "__main__":

compiler/tests/25_verilog_sram_test.py

@@ -44,6 +44,8 @@ class verilog_test(unittest.TestCase):
 
         os.system("rm {0}".format(vname))
 
+        globals.end_openram()
+        
 # instantiate a copdsay of the class to actually run the test
 if __name__ == "__main__":
     (OPTS, args) = globals.parse_args()

compiler/tests/30_openram_test.py

@@ -73,6 +73,7 @@ class openram_test(unittest.TestCase):
             shutil.rmtree(out_path, ignore_errors=True)
         self.assertEqual(os.path.exists(out_path),False)
 
+        globals.end_openram()        
 
 # instantiate a copdsay of the class to actually run the test
 if __name__ == "__main__":