luke/OpenRAM
1
0
Fork 0
mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-08-30 01:48:33 +02:00
Code Issues Packages Projects Releases Wiki Activity

updated imports to match upstream dev openram

Browse Source
This commit is contained in:
Jacob Walker
2023-03-30 11:30:50 -07:00
parent 63925bd48e
commit b2631b60ff
14 changed files with 80 additions and 77 deletions
Download Patch File Download Diff File Expand all files Collapse all files
compiler/modules/rom_base_array.py
+4 -5
View File
@@ -9,11 +9,10 @@
import math
from .bitcell_base_array import bitcell_base_array
from base import vector
from globals import OPTS
from sram_factory import factory
import tech
from tech import drc
from openram.base import vector
from openram import OPTS
from openram.sram_factory import factory
from openram.tech import drc
class rom_base_array(bitcell_base_array):