mirror of https://github.com/VLSIDA/OpenRAM.git
Fixed path measurement in delay
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@ -305,7 +305,10 @@ class delay(simulation):
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cur_net, next_net = path[i], path[i+1]
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cur_dir, next_dir = path_dirs[i], path_dirs[i+1]
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meas_name = "delay_{}_to_{}".format(cur_net, next_net)
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path_meas.append(delay_measure(meas_name, cur_net, next_net, cur_dir, next_dir, measure_scale=1e9, has_port=False))
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if i+1 != len(path)-1:
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path_meas.append(delay_measure(meas_name, cur_net, next_net, cur_dir, next_dir, measure_scale=1e9, has_port=False))
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else: # Make the last measurement always measure on FALL because is a read 0
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path_meas.append(delay_measure(meas_name, cur_net, next_net, cur_dir, "FALL", measure_scale=1e9, has_port=False))
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# Some bitcell logic is hardcoded for only read zeroes, force that here as well.
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path_meas[-1].meta_str = sram_op.READ_ZERO
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path_meas[-1].meta_add_delay = True
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