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Add ptx cell properties
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@@ -71,7 +71,7 @@ class wordline_buffer_array(design.design):
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Add a pin for each row of vdd/gnd which
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are must-connects next level up.
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"""
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if layer_props.wordline_buffer_array.vertical_supply:
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if layer_props.wordline_driver.vertical_supply:
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for name in ["vdd", "gnd"]:
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supply_pins = self.wld_inst[0].get_pins(name)
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for pin in supply_pins:
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