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Remove debug trace

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mrg
2019-07-12 10:17:33 -07:00
parent 043018e8ba
commit aa552f8e96
1 changed files with 1 additions and 1 deletions
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compiler/tests/testutils.py
+1 -1
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@@ -61,7 +61,7 @@ class openram_test(unittest.TestCase):
self.fail("LVS mismatch: {}".format(a.name))
# For debug...
import pdb; pdb.set_trace()
#import pdb; pdb.set_trace()
if OPTS.purge_temp:
self.cleanup()