luke/OpenRAM
1
0
Fork 0
mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-09-01 18:48:10 +02:00
Code Issues Packages Projects Releases Wiki Activity

Merge branch 'dev' into char

Browse Source
This commit is contained in:
Bugra Onal
2023-01-19 12:18:38 -08:00
parent bcb0f379fe 5816c669f3
commit a7cbf254be
496 changed files with 4423 additions and 3779 deletions
Download Patch File Download Diff File Expand all files Collapse all files
compiler/characterizer/simulation.py
+6 -6
View File
@@ -1,16 +1,16 @@
# See LICENSE for licensing information.
#
# Copyright (c) 2016-2021 Regents of the University of California and The Board
# Copyright (c) 2016-2022 Regents of the University of California and The Board
# of Regents for the Oklahoma Agricultural and Mechanical College
# (acting for and on behalf of Oklahoma State University)
# All rights reserved.
#
import debug
import math
import tech
from globals import OPTS
from sram_factory import factory
from base import timing_graph
from openram import debug
from openram.base import timing_graph
from openram.sram_factory import factory
from openram import tech
from openram import OPTS
class simulation():