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https://github.com/VLSIDA/OpenRAM.git
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First draft of sram_factory code
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@@ -55,13 +55,12 @@ class dff_inv(design.design):
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self.add_pin("gnd")
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def add_modules(self):
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from importlib import reload
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c = reload(__import__(OPTS.dff))
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self.mod_dff = getattr(c, OPTS.dff)
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self.dff = self.mod_dff("dff")
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self.dff = dff_inv.dff_inv(self.inv_size)
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self.add_mod(self.dff)
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self.inv1 = pinv(size=self.inv_size,height=self.dff.height)
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self.inv1 = factory.create(module_type="pinv",
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size=self.inv_size,
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height=self.dff.height)
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self.add_mod(self.inv1)
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def create_modules(self):
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@@ -152,4 +151,4 @@ class dff_inv(design.design):
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def get_clk_cin(self):
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"""Return the total capacitance (in relative units) that the clock is loaded by in the dff"""
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return self.dff.get_clk_cin()
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return self.dff.get_clk_cin()
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