mirror of https://github.com/VLSIDA/OpenRAM.git
Fix power pin layer problems in delay line
This commit is contained in:
parent
98ec9442c6
commit
93d65e84e1
|
|
@ -178,10 +178,14 @@ class delay_chain(design.design):
|
||||||
load_list = self.load_inst_map[inst]
|
load_list = self.load_inst_map[inst]
|
||||||
for pin_name in ["vdd", "gnd"]:
|
for pin_name in ["vdd", "gnd"]:
|
||||||
pin = load_list[0].get_pin(pin_name)
|
pin = load_list[0].get_pin(pin_name)
|
||||||
self.add_power_pin(pin_name, pin.rc() - vector(self.m1_pitch, 0))
|
self.add_power_pin(pin_name,
|
||||||
|
pin.rc() - vector(self.m1_pitch, 0),
|
||||||
|
start_layer=pin.layer)
|
||||||
|
|
||||||
pin = load_list[-1].get_pin(pin_name)
|
pin = load_list[-2].get_pin(pin_name)
|
||||||
self.add_power_pin(pin_name, pin.rc() - vector(0.5 * self.m1_pitch, 0))
|
self.add_power_pin(pin_name,
|
||||||
|
pin.rc() - vector(self.m1_pitch, 0),
|
||||||
|
start_layer=pin.layer)
|
||||||
|
|
||||||
def add_layout_pins(self):
|
def add_layout_pins(self):
|
||||||
|
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue