mirror of https://github.com/VLSIDA/OpenRAM.git
point local array to new capped array module
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@ -67,7 +67,7 @@ class local_bitcell_array(bitcell_base_array):
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# This is just used for names
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self.cell = factory.create(module_type=OPTS.bitcell)
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self.bitcell_array = factory.create(module_type="replica_bitcell_array",
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self.bitcell_array = factory.create(module_type="capped_replica_bitcell_array",
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cols=self.cols,
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rows=self.rows,
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rbl=self.rbl,
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