fix bitcell array opc errors

This commit is contained in:
Jesse Cirimelli-Low 2021-12-14 22:15:27 -08:00
parent 2fb08af684
commit 8eb6caa248
4 changed files with 26 additions and 9 deletions

View File

@ -47,6 +47,8 @@ class sky130_bitcell_array(bitcell_array, sky130_bitcell_base_array):
self.add_mod(self.strap2)
self.strap3 = factory.create(module_type="internal", version="wlstrapa")
self.add_mod(self.strap3)
self.strap4 = factory.create(module_type="internal", version="wlstrapa_p")
self.add_mod(self.strap4)
def create_instances(self):
""" Create the module instances used in this design """
@ -71,9 +73,14 @@ class sky130_bitcell_array(bitcell_array, sky130_bitcell_base_array):
self.connect_inst(self.get_bitcell_pins(row, col))
if col != self.column_size - 1:
if alternate_strap:
row_layout.append(self.strap2)
self.add_inst(name="row_{}_col_{}_wlstrap".format(row, col),
mod=self.strap2)
if row % 2:
row_layout.append(self.strap4)
self.add_inst(name="row_{}_col_{}_wlstrap".format(row, col),
mod=self.strap4)
else:
row_layout.append(self.strap2)
self.add_inst(name="row_{}_col_{}_wlstrap".format(row, col),
mod=self.strap2)
alternate_strap = 0
else:
if row % 2:

View File

@ -52,6 +52,8 @@ class sky130_dummy_array(sky130_bitcell_base_array):
self.add_mod(self.strap)
self.strap2 = factory.create(module_type="internal", version="wlstrap_p")
self.add_mod(self.strap2)
self.strap3 = factory.create(module_type="internal", version="wlstrapa")
self.add_mod(self.strap3)
self.cell = factory.create(module_type=OPTS.bitcell, version="opt1")
def create_instances(self):
@ -82,10 +84,14 @@ class sky130_dummy_array(sky130_bitcell_base_array):
mod=self.strap2)
alternate_strap = 0
else:
row_layout.append(self.strap)
self.add_inst(name="row_{}_col_{}_wlstrap".format(row, col),
mod=self.strap)
if col % 2:
row_layout.append(self.strap)
self.add_inst(name="row_{}_col_{}_wlstrap".format(row, col),
mod=self.strap)
else:
row_layout.append(self.strap3)
self.add_inst(name="row_{}_col_{}_wlstrap".format(row, col),
mod=self.strap3)
alternate_strap = 1
self.connect_inst(self.get_strap_pins(row, col))
if alternate_bitcell == 0:

View File

@ -22,6 +22,8 @@ class sky130_internal(design.design):
self.name = "sky130_fd_bd_sram__sram_sp_wlstrap_p"
elif version == "wlstrapa":
self.name = "sky130_fd_bd_sram__sram_sp_wlstrapa"
elif version == "wlstrapa_p":
self.name = "sky130_fd_bd_sram__sram_sp_wlstrapa_p"
else:
debug.error("Invalid version", -1)
design.design.__init__(self, name=self.name)

View File

@ -104,6 +104,8 @@ class sky130_replica_column(sky130_bitcell_base_array):
self.add_mod(self.strap1)
self.strap2 = factory.create(module_type="internal", version="wlstrap_p")
self.add_mod(self.strap2)
self.strap3 = factory.create(module_type="internal", version="wlstrapa_p")
self.add_mod(self.strap3)
self.colend = factory.create(module_type="col_cap", version="colend")
self.edge_cell = self.colend
@ -140,8 +142,8 @@ class sky130_replica_column(sky130_bitcell_base_array):
row_layout.append(self.replica_cell2)
self.cell_inst[row]=self.add_inst(name=name, mod=self.replica_cell2)
self.connect_inst(self.get_bitcell_pins(row, 0))
row_layout.append(self.strap2)
self.add_inst(name=name + "_strap", mod=self.strap2)
row_layout.append(self.strap3)
self.add_inst(name=name + "_strap", mod=self.strap3)
self.connect_inst(self.get_strap_pins(row, 0))
alternate_bitcell = 0