Replica bitcell with all the fixings

2026-08-29 17:39:02 +02:00 · 2020-08-11 15:00:29 -07:00
parent eef97ff215
commit 8e890c2014
6 changed files with 197 additions and 148 deletions
@@ -58,8 +58,11 @@ class wordline_buffer_array(design.design):
        self.add_pin("gnd", "GROUND")

    def add_modules(self):
+        b = factory.create(module_type="bitcell")
+        
        self.wl_driver = factory.create(module_type="inv_dec",
-                                        size=self.cols)
+                                        size=self.cols,
+                                        height=b.height)
        self.add_mod(self.wl_driver)
        
    def route_vdd_gnd(self):