luke/OpenRAM
1
0
Fork 0
mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-08-30 01:48:33 +02:00
Code Issues Packages Projects Releases Wiki Activity

Use OPTS.bitcell everywhere

Browse Source
This commit is contained in:
mrg
2020-11-05 16:55:08 -08:00
parent 18d2987805
commit 8be1436d51
17 changed files with 21 additions and 20 deletions
Download Patch File Download Diff File Expand all files Collapse all files
compiler/modules/dummy_array.py
+2 -2
View File
@@ -44,8 +44,8 @@ class dummy_array(bitcell_base_array):
def add_modules(self):
""" Add the modules used in this design """
self.dummy_cell = factory.create(module_type="dummy_{}".format(OPTS.bitcell))
self.cell = factory.create(module_type="bitcell")
self.dummy_cell = factory.create(module_type=OPTS.dummy_bitcell)
self.cell = factory.create(module_type=OPTS.bitcell)
self.add_mod(self.dummy_cell)
def create_instances(self):