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Fixed test 23_lib_sram_test. Fixed syntax in related golden lib files.

This commit is contained in:
Hunter Nichols 2018-09-06 22:51:34 -07:00
parent 0ff3b29b66
commit 8aaf1155d1
3 changed files with 12 additions and 111 deletions
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41
compiler/tests/golden/sram_2_16_1_freepdk45_TT_1p0V_25C.lib
View File

@ -87,16 +87,16 @@ cell (sram_2_16_1_freepdk45){
cell_leakage_power : 0;
bus(DIN){
bus_type : DATA;
direction : in;
max_capacitance : 1.6728;
min_capacitance : 0.052275;
direction : input;
capacitance : 0.2091;
memory_write(){
address : ADDR;
clocked_on : clk;
}
}
bus(DOUT){
bus_type : DATA;
direction : out;
direction : output;
max_capacitance : 1.6728;
min_capacitance : 0.052275;
memory_read(){
@ -229,39 +229,6 @@ cell (sram_2_16_1_freepdk45){
}
}
pin(OEb){
direction : input;
capacitance : 0.2091;
timing(){
timing_type : setup_rising;
related_pin : "clk";
rise_constraint(CONSTRAINT_TABLE) {
values("0.009, 0.015, 0.027",\
"0.009, 0.015, 0.027",\
"0.009, 0.015, 0.027");
}
fall_constraint(CONSTRAINT_TABLE) {
values("0.009, 0.009, 0.015",\
"0.009, 0.009, 0.015",\
"0.009, 0.009, 0.015");
}
}
timing(){
timing_type : hold_rising;
related_pin : "clk";
rise_constraint(CONSTRAINT_TABLE) {
values("0.002, 0.002, -0.004",\
"0.002, 0.002, -0.004",\
"0.002, 0.002, -0.004");
}
fall_constraint(CONSTRAINT_TABLE) {
values("-0.004, -0.004, -0.016",\
"-0.004, -0.004, -0.016",\
"-0.004, -0.004, -0.016");
}
}
}
pin(WEb){
direction : input;
capacitance : 0.2091;

41
compiler/tests/golden/sram_2_16_1_freepdk45_TT_1p0V_25C_analytical.lib
View File

@ -87,16 +87,16 @@ cell (sram_2_16_1_freepdk45){
cell_leakage_power : 0;
bus(DIN){
bus_type : DATA;
direction : in;
max_capacitance : 1.6728;
min_capacitance : 0.052275;
direction : input;
capacitance : 0.2091;
memory_write(){
address : ADDR;
clocked_on : clk;
}
}
bus(DOUT){
bus_type : DATA;
direction : out;
direction : output;
max_capacitance : 1.6728;
min_capacitance : 0.052275;
memory_read(){
@ -229,39 +229,6 @@ cell (sram_2_16_1_freepdk45){
}
}
pin(OEb){
direction : input;
capacitance : 0.2091;
timing(){
timing_type : setup_rising;
related_pin : "clk";
rise_constraint(CONSTRAINT_TABLE) {
values("0.009, 0.009, 0.009",\
"0.009, 0.009, 0.009",\
"0.009, 0.009, 0.009");
}
fall_constraint(CONSTRAINT_TABLE) {
values("0.009, 0.009, 0.009",\
"0.009, 0.009, 0.009",\
"0.009, 0.009, 0.009");
}
}
timing(){
timing_type : hold_rising;
related_pin : "clk";
rise_constraint(CONSTRAINT_TABLE) {
values("0.001, 0.001, 0.001",\
"0.001, 0.001, 0.001",\
"0.001, 0.001, 0.001");
}
fall_constraint(CONSTRAINT_TABLE) {
values("0.001, 0.001, 0.001",\
"0.001, 0.001, 0.001",\
"0.001, 0.001, 0.001");
}
}
}
pin(WEb){
direction : input;
capacitance : 0.2091;

41
compiler/tests/golden/sram_2_16_1_scn3me_subm_TT_5p0V_25C.lib
View File

@ -87,16 +87,16 @@ cell (sram_2_16_1_scn3me_subm){
cell_leakage_power : 0;
bus(DIN){
bus_type : DATA;
direction : in;
max_capacitance : 78.5936;
min_capacitance : 2.45605;
direction : input;
capacitance : 9.8242;
memory_write(){
address : ADDR;
clocked_on : clk;
}
}
bus(DOUT){
bus_type : DATA;
direction : out;
direction : output;
max_capacitance : 78.5936;
min_capacitance : 2.45605;
memory_read(){
@ -229,39 +229,6 @@ cell (sram_2_16_1_scn3me_subm){
}
}
pin(OEb){
direction : input;
capacitance : 9.8242;
timing(){
timing_type : setup_rising;
related_pin : "clk";
rise_constraint(CONSTRAINT_TABLE) {
values("0.076, 0.076, 0.149",\
"0.076, 0.076, 0.149",\
"0.076, 0.076, 0.149");
}
fall_constraint(CONSTRAINT_TABLE) {
values("0.033, 0.039, 0.027",\
"0.033, 0.039, 0.027",\
"0.033, 0.039, 0.027");
}
}
timing(){
timing_type : hold_rising;
related_pin : "clk";
rise_constraint(CONSTRAINT_TABLE) {
values("-0.004, -0.004, 0.009",\
"-0.004, -0.004, 0.009",\
"-0.004, -0.004, 0.009");
}
fall_constraint(CONSTRAINT_TABLE) {
values("-0.052, -0.059, -0.132",\
"-0.052, -0.059, -0.132",\
"-0.052, -0.059, -0.132");
}
}
}
pin(WEb){
direction : input;
capacitance : 9.8242;