mirror of
https://github.com/VLSIDA/OpenRAM.git
synced 2026-08-29 17:39:02 +02:00
Update unit tests to load verify after config file. Start magic DRC.
This commit is contained in:
@@ -10,15 +10,13 @@ sys.path.append(os.path.join(sys.path[0],".."))
|
||||
import globals
|
||||
from globals import OPTS
|
||||
import debug
|
||||
import verify
|
||||
|
||||
#@unittest.skip("SKIPPING 10_write_driver_test")
|
||||
|
||||
|
||||
class write_driver_test(unittest.TestCase):
|
||||
|
||||
def runTest(self):
|
||||
globals.init_openram("config_20_{0}".format(OPTS.tech_name))
|
||||
global verify
|
||||
import verify
|
||||
OPTS.check_lvsdrc = False
|
||||
|
||||
import write_driver_array
|
||||
|
||||
Reference in New Issue
Block a user