luke
/
OpenRAM
mirror of https://github.com/VLSIDA/OpenRAM.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Allow supply pins on m4 too

This commit is contained in:
mrg 2022-03-02 16:47:17 -08:00
parent 51ba88d896
commit 7654cd7295
3 changed files with 14 additions and 19 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

26
compiler/base/hierarchy_layout.py
View File

@ -67,9 +67,9 @@ class layout():
try: try:
from tech import power_grid from tech import power_grid
self.pwr_grid_layer = power_grid[0] self.pwr_grid_layers = [power_grid[0], power_grid[2]]
except ImportError: except ImportError:
self.pwr_grid_layer = "m3" self.pwr_grid_layers = ["m3", "m4"]
############################################################ ############################################################
# GDS layout # GDS layout
@ -1373,7 +1373,7 @@ class layout():
for pin in pins: for pin in pins:
if new_name == "": if new_name == "":
new_name = pin.name new_name = pin.name
if pin.layer == self.pwr_grid_layer: if pin.layer in self.pwr_grid_layers:
self.add_layout_pin(new_name, self.add_layout_pin(new_name,
pin.layer, pin.layer,
pin.ll(), pin.ll(),
@ -1398,22 +1398,22 @@ class layout():
def add_power_pin(self, name, loc, directions=None, start_layer="m1"): def add_power_pin(self, name, loc, directions=None, start_layer="m1"):
# Hack for min area # Hack for min area
if OPTS.tech_name == "sky130": if OPTS.tech_name == "sky130":
min_area = drc["minarea_{}".format(self.pwr_grid_layer)] min_area = drc["minarea_{}".format(self.pwr_grid_layers[2])]
width = round_to_grid(sqrt(min_area)) width = round_to_grid(sqrt(min_area))
height = round_to_grid(min_area / width) height = round_to_grid(min_area / width)
else: else:
width = None width = None
height = None height = None
if start_layer == self.pwr_grid_layer: if start_layer in self.pwr_grid_layers:
self.add_layout_pin_rect_center(text=name, self.add_layout_pin_rect_center(text=name,
layer=self.pwr_grid_layer, layer=start_layer,
offset=loc, offset=loc,
width=width, width=width,
height=height) height=height)
else: else:
via = self.add_via_stack_center(from_layer=start_layer, via = self.add_via_stack_center(from_layer=start_layer,
to_layer=self.pwr_grid_layer, to_layer=self.pwr_grid_layers[0],
offset=loc, offset=loc,
directions=directions) directions=directions)
@ -1422,7 +1422,7 @@ class layout():
if not height: if not height:
height = via.height height = via.height
self.add_layout_pin_rect_center(text=name, self.add_layout_pin_rect_center(text=name,
layer=self.pwr_grid_layer, layer=self.pwr_grid_layers[0],
offset=loc, offset=loc,
width=width, width=width,
height=height) height=height)
@ -1441,22 +1441,22 @@ class layout():
# Hack for min area # Hack for min area
if OPTS.tech_name == "sky130": if OPTS.tech_name == "sky130":
min_area = drc["minarea_{}".format(self.pwr_grid_layer)] min_area = drc["minarea_{}".format(self.pwr_grid_layers[1])]
width = round_to_grid(sqrt(min_area)) width = round_to_grid(sqrt(min_area))
height = round_to_grid(min_area / width) height = round_to_grid(min_area / width)
else: else:
width = None width = None
height = None height = None
if pin.layer == self.pwr_grid_layer: if pin.layer in self.pwr_grid_layers:
self.add_layout_pin_rect_center(text=new_name, self.add_layout_pin_rect_center(text=new_name,
layer=self.pwr_grid_layer, layer=pin.layer,
offset=loc, offset=loc,
width=width, width=width,
height=height) height=height)
else: else:
via = self.add_via_stack_center(from_layer=pin.layer, via = self.add_via_stack_center(from_layer=pin.layer,
to_layer=self.pwr_grid_layer, to_layer=self.pwr_grid_layers[0],
offset=loc, offset=loc,
directions=directions) directions=directions)
@ -1465,7 +1465,7 @@ class layout():
if not height: if not height:
height = via.height height = via.height
self.add_layout_pin_rect_center(text=new_name, self.add_layout_pin_rect_center(text=new_name,
layer=self.pwr_grid_layer, layer=self.pwr_grid_layers[0],
offset=loc, offset=loc,
width=width, width=width,
height=height) height=height)

5
compiler/modules/write_driver_array.py
View File

@ -206,11 +206,6 @@ class write_driver_array(design.design):
self.route_horizontal_pins("vdd") self.route_horizontal_pins("vdd")
self.route_horizontal_pins("gnd") self.route_horizontal_pins("gnd")
# Old pin routing
# for n in ["vdd", "gnd"]:
# pin_list = self.local_insts[i].get_pins(n)
# for pin in pin_list:
# self.copy_power_pin(pin, directions=("V", "V"))
if self.write_size: if self.write_size:
for bit in range(self.num_wmasks): for bit in range(self.num_wmasks):

2
compiler/sram/sram_1bank.py
View File

@ -260,7 +260,7 @@ class sram_1bank(sram_base):
if add_vias: if add_vias:
pin_layer = None pin_layer = None
else: else:
pin_layer = self.pwr_grid_layer pin_layer = self.pwr_grid_layers[0]
# Connect the control pins as inputs # Connect the control pins as inputs
for signal in self.control_logic_inputs[port]: for signal in self.control_logic_inputs[port]: