From 7654cd729540727f6216dc41797d859a50382117 Mon Sep 17 00:00:00 2001 From: mrg Date: Wed, 2 Mar 2022 16:47:17 -0800 Subject: [PATCH] Allow supply pins on m4 too --- compiler/base/hierarchy_layout.py | 26 +++++++++++++------------- compiler/modules/write_driver_array.py | 5 ----- compiler/sram/sram_1bank.py | 2 +- 3 files changed, 14 insertions(+), 19 deletions(-) diff --git a/compiler/base/hierarchy_layout.py b/compiler/base/hierarchy_layout.py index 9ab12827..a003c174 100644 --- a/compiler/base/hierarchy_layout.py +++ b/compiler/base/hierarchy_layout.py @@ -67,9 +67,9 @@ class layout(): try: from tech import power_grid - self.pwr_grid_layer = power_grid[0] + self.pwr_grid_layers = [power_grid[0], power_grid[2]] except ImportError: - self.pwr_grid_layer = "m3" + self.pwr_grid_layers = ["m3", "m4"] ############################################################ # GDS layout @@ -1373,7 +1373,7 @@ class layout(): for pin in pins: if new_name == "": new_name = pin.name - if pin.layer == self.pwr_grid_layer: + if pin.layer in self.pwr_grid_layers: self.add_layout_pin(new_name, pin.layer, pin.ll(), @@ -1398,22 +1398,22 @@ class layout(): def add_power_pin(self, name, loc, directions=None, start_layer="m1"): # Hack for min area if OPTS.tech_name == "sky130": - min_area = drc["minarea_{}".format(self.pwr_grid_layer)] + min_area = drc["minarea_{}".format(self.pwr_grid_layers[2])] width = round_to_grid(sqrt(min_area)) height = round_to_grid(min_area / width) else: width = None height = None - if start_layer == self.pwr_grid_layer: + if start_layer in self.pwr_grid_layers: self.add_layout_pin_rect_center(text=name, - layer=self.pwr_grid_layer, + layer=start_layer, offset=loc, width=width, height=height) else: via = self.add_via_stack_center(from_layer=start_layer, - to_layer=self.pwr_grid_layer, + to_layer=self.pwr_grid_layers[0], offset=loc, directions=directions) @@ -1422,7 +1422,7 @@ class layout(): if not height: height = via.height self.add_layout_pin_rect_center(text=name, - layer=self.pwr_grid_layer, + layer=self.pwr_grid_layers[0], offset=loc, width=width, height=height) @@ -1441,22 +1441,22 @@ class layout(): # Hack for min area if OPTS.tech_name == "sky130": - min_area = drc["minarea_{}".format(self.pwr_grid_layer)] + min_area = drc["minarea_{}".format(self.pwr_grid_layers[1])] width = round_to_grid(sqrt(min_area)) height = round_to_grid(min_area / width) else: width = None height = None - if pin.layer == self.pwr_grid_layer: + if pin.layer in self.pwr_grid_layers: self.add_layout_pin_rect_center(text=new_name, - layer=self.pwr_grid_layer, + layer=pin.layer, offset=loc, width=width, height=height) else: via = self.add_via_stack_center(from_layer=pin.layer, - to_layer=self.pwr_grid_layer, + to_layer=self.pwr_grid_layers[0], offset=loc, directions=directions) @@ -1465,7 +1465,7 @@ class layout(): if not height: height = via.height self.add_layout_pin_rect_center(text=new_name, - layer=self.pwr_grid_layer, + layer=self.pwr_grid_layers[0], offset=loc, width=width, height=height) diff --git a/compiler/modules/write_driver_array.py b/compiler/modules/write_driver_array.py index c94f3009..e4192f4a 100644 --- a/compiler/modules/write_driver_array.py +++ b/compiler/modules/write_driver_array.py @@ -206,11 +206,6 @@ class write_driver_array(design.design): self.route_horizontal_pins("vdd") self.route_horizontal_pins("gnd") -# Old pin routing -# for n in ["vdd", "gnd"]: -# pin_list = self.local_insts[i].get_pins(n) -# for pin in pin_list: -# self.copy_power_pin(pin, directions=("V", "V")) if self.write_size: for bit in range(self.num_wmasks): diff --git a/compiler/sram/sram_1bank.py b/compiler/sram/sram_1bank.py index a6abeba6..ce10eb4f 100644 --- a/compiler/sram/sram_1bank.py +++ b/compiler/sram/sram_1bank.py @@ -260,7 +260,7 @@ class sram_1bank(sram_base): if add_vias: pin_layer = None else: - pin_layer = self.pwr_grid_layer + pin_layer = self.pwr_grid_layers[0] # Connect the control pins as inputs for signal in self.control_logic_inputs[port]: