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copy vertical bus spacing from control_logic.py

This commit is contained in:
samuelkcrow 2022-07-18 10:49:55 -07:00
parent 2611468dd7
commit 73021be8eb
1 changed files with 2 additions and 1 deletions
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3
compiler/modules/control_logic_delay.py
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@ -315,7 +315,8 @@ class control_logic_delay(design.design):
self.place_dffs()
# All of the control logic is placed to the right of the DFFs and bus
self.control_x_offset = self.ctrl_dff_array.width + self.internal_bus_width
# as well as the power supply stripe
self.control_x_offset = self.ctrl_dff_array.width + self.internal_bus_width + self.m4_pitch
row = 0
# Add the logic on the right of the bus