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Add wells to driver stages. Remove unnecessary height/center in control logic.

This commit is contained in:
mrg 2021-03-25 10:00:24 -07:00
parent 4a40e96f6d
commit 6e2f60353c
2 changed files with 1 additions and 5 deletions
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2
compiler/modules/control_logic.py
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@ -338,8 +338,6 @@ class control_logic(design.design):
row += 1 row += 1
if (self.port_type == "rw") or (self.port_type == "w"): if (self.port_type == "rw") or (self.port_type == "w"):
self.place_wen_row(row) self.place_wen_row(row)
height = self.w_en_gate_inst.uy()
control_center_y = self.w_en_gate_inst.uy()
row += 1 row += 1
self.place_pen_row(row) self.place_pen_row(row)
row += 1 row += 1

4
compiler/pgates/pdriver.py
View File

@ -87,13 +87,11 @@ class pdriver(pgate.pgate):
def add_modules(self): def add_modules(self):
self.inv_list = [] self.inv_list = []
add_well = self.add_wells
for size in self.size_list: for size in self.size_list:
temp_inv = factory.create(module_type="pinv", temp_inv = factory.create(module_type="pinv",
size=size, size=size,
height=self.height, height=self.height,
add_wells=add_well) add_wells=self.add_wells)
add_well=False
self.inv_list.append(temp_inv) self.inv_list.append(temp_inv)
self.add_mod(temp_inv) self.add_mod(temp_inv)