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Characterization for extra rows

This commit is contained in:
Aditi Sinha 2020-02-20 17:31:58 +00:00
parent 34939ebd70
commit 694ea5c20e
2 changed files with 2 additions and 2 deletions
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2
compiler/modules/bank.py
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@ -8,7 +8,7 @@
import debug import debug
import design import design
from sram_factory import factory from sram_factory import factory
from math import log from math import log, ceil
from tech import drc from tech import drc
from vector import vector from vector import vector
from globals import OPTS from globals import OPTS

2
compiler/tests/21_ngspice_delay_extra_rows_test.py
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@ -33,7 +33,7 @@ class timing_sram_test(openram_test):
c = sram_config(word_size=1, c = sram_config(word_size=1,
num_words=16, num_words=16,
num_banks=1, num_banks=1,
num_spare_rows=5) num_spare_rows=3)
c.words_per_row=1 c.words_per_row=1
c.recompute_sizes() c.recompute_sizes()
debug.info(1, "Testing timing for sample 1bit, 16words SRAM with 1 bank") debug.info(1, "Testing timing for sample 1bit, 16words SRAM with 1 bank")