mirror of https://github.com/VLSIDA/OpenRAM.git
adding variable for w_ports to be used in multiport design
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@ -48,6 +48,7 @@ class options(optparse.Values):
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# These are the configuration parameters
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# These are the configuration parameters
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rw_ports = 1
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rw_ports = 1
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r_ports = 0
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r_ports = 0
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w_ports = 0
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# These will get initialized by the the file
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# These will get initialized by the the file
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supply_voltages = ""
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supply_voltages = ""
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temperatures = ""
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temperatures = ""
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