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Fix gnd connection in control logic.

This commit is contained in:
Matt Guthaus 2018-02-02 13:04:38 -08:00
parent 072c8e3174
commit 63392c8d71
4 changed files with 9 additions and 8 deletions
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1
compiler/control_logic.py
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@ -326,6 +326,7 @@ class control_logic(design.design):
x_off += self.inv1.width x_off += self.inv1.width
# BUFFER INVERTERS FOR W_EN # BUFFER INVERTERS FOR W_EN
# FIXME: Can we remove these two invs and size the previous one?
self.pre_w_en_bar_offset = vector(x_off, y_off) self.pre_w_en_bar_offset = vector(x_off, y_off)
self.pre_w_en_bar=self.add_inst(name="inv_pre_w_en_bar", self.pre_w_en_bar=self.add_inst(name="inv_pre_w_en_bar",
mod=self.inv1, mod=self.inv1,

12
compiler/replica_bitline.py
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@ -242,11 +242,15 @@ class replica_bitline(design.design):
# Add a rail in M1 from bottom to two along delay chain # Add a rail in M1 from bottom to two along delay chain
gnd_start = self.rbl_inv_inst.get_pin("gnd").ll() - self.offset_fix gnd_start = self.rbl_inv_inst.get_pin("gnd").ll() - self.offset_fix
self.add_rect(layer="metal2",
offset=gnd_start,
width=self.m2_width,
height=self.rbl_inst.uy()+2*self.m2_pitch - gnd_start.y)
self.add_layout_pin(text="gnd", self.add_layout_pin(text="gnd",
layer="metal2", layer="metal1",
offset=gnd_start.scale(1,0), offset=gnd_start.scale(1,0),
width=self.m2_width, width=self.m1_width,
height=self.rbl_inst.uy()+2*self.m2_pitch) height=gnd_start.y)
# Connect the WL pins directly to gnd # Connect the WL pins directly to gnd
for row in range(self.rows): for row in range(self.rows):
@ -273,8 +277,6 @@ class replica_bitline(design.design):
# Connect the bitcell gnd pins to the rail # Connect the bitcell gnd pins to the rail
gnd_pins = self.get_pins("gnd") gnd_pins = self.get_pins("gnd")
gnd_start = gnd_pins[0].ul() gnd_start = gnd_pins[0].ul()
self.add_via_center(layers=("metal1", "via1", "metal2"),
offset=gnd_pins[0].uc())
rbl_gnd_pins = self.rbl_inst.get_pins("gnd") rbl_gnd_pins = self.rbl_inst.get_pins("gnd")
# Add L shapes to each vertical gnd rail # Add L shapes to each vertical gnd rail
for pin in rbl_gnd_pins: for pin in rbl_gnd_pins:

2
compiler/route.py
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@ -7,7 +7,7 @@ from vector3d import vector3d
class route(): class route():
""" """
Object route Object route (used by the router module)
Add a route of minimium metal width between a set of points. Add a route of minimium metal width between a set of points.
The wire must be completely rectilinear and the The wire must be completely rectilinear and the
z-dimension of the points refers to the layers (plus via) z-dimension of the points refers to the layers (plus via)

2
compiler/wire.py
View File

@ -12,8 +12,6 @@ class wire(path):
The points are the center of the wire. The points are the center of the wire.
The layer stack is the vertical, contact/via, and horizontal layers, respectively. The layer stack is the vertical, contact/via, and horizontal layers, respectively.
""" """
unique_id = 1
def __init__(self, obj, layer_stack, position_list): def __init__(self, obj, layer_stack, position_list):
self.obj = obj self.obj = obj
self.layer_stack = layer_stack self.layer_stack = layer_stack