luke/OpenRAM
1
0
Fork 0
mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-09-07 03:20:39 +02:00
Code Issues Packages Projects Releases Wiki Activity

Added initial version of analytical power esitmation. Loops through instances but power estimate is not accurate.

Browse Source
This commit is contained in:
Hunter Nichols
2018-02-22 19:35:54 -08:00
parent beb7dad9bc
commit 62ad30e741
16 changed files with 333 additions and 77 deletions
Download Patch File Download Diff File Expand all files Collapse all files
compiler/modules/tri_gate.py
+4 -3
View File
@@ -33,9 +33,10 @@ class tri_gate(design.design):
c_para = spice["min_tx_drain_c"]
return self.cal_delay_with_rc(r = r, c = c_para+load, slew = slew)
def analytical_power(self, slew, load=0.0):
#Skeleton code for the power of a trigate. Returns magic number for now.
return 2
def analytical_power(self, vdd, temp, load):
#Not sure how to determine this yet. Tri-gates return zero power for now
total_power = self.return_power()
return total_power
def input_load(self):