mirror of https://github.com/VLSIDA/OpenRAM.git
Remove banks from example configs
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@ -7,7 +7,7 @@ supply_voltages = [1.0]
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temperatures = [25]
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temperatures = [25]
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output_path = "temp"
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output_path = "temp"
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output_name = "sram_{0}_{1}_{2}_{3}".format(word_size,num_words,num_banks,tech_name)
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output_name = "sram_{0}_{1}_{2}".format(word_size,num_words,tech_name)
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#Below are some additions to test additional ports on sram
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#Below are some additions to test additional ports on sram
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#bitcell = "pbitcell"
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#bitcell = "pbitcell"
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@ -7,4 +7,4 @@ supply_voltages = [ 5.0 ]
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temperatures = [ 25 ]
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temperatures = [ 25 ]
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output_path = "temp"
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output_path = "temp"
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output_name = "sram_{0}_{1}_{2}_{3}".format(word_size,num_words,num_banks,tech_name)
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output_name = "sram_{0}_{1}_{2}".format(word_size,num_words,tech_name)
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