mirror of https://github.com/VLSIDA/OpenRAM.git
Update nwell spacing to be same potential
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2e846cb22f
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@ -161,7 +161,8 @@ R27_9 = ( 2 *LAMBDA ).round(3)
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if !SUBM && !DEEP
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R1_1 = ( 10 *LAMBDA ).round(3)
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R1_2 = ( 9 *LAMBDA ).round(3)
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R1_2 = ( 6 *LAMBDA ).round(3)
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#R1_2 = ( 9 *LAMBDA ).round(3)
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R2_3 = ( 5 *LAMBDA ).round(3)
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R3_2 = ( 2 *LAMBDA ).round(3)
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R3_2_a = ( 2 *LAMBDA ).round(3)
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@ -211,7 +212,10 @@ end
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if SUBM
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R1_1 = ( 12 *LAMBDA ).round(3)
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R1_2 = ( 18 *LAMBDA ).round(3)
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# We are assuming the wells are at the same potential since
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# DRC can't tell otherwise
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#R1_2 = ( 18 *LAMBDA ).round(3)
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R1_2 = ( 6 *LAMBDA ).round(3)
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R2_3 = ( 6 *LAMBDA ).round(3)
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R3_2 = ( 3 *LAMBDA ).round(3)
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R3_2_a = ( 3 *LAMBDA ).round(3)
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@ -301,7 +305,10 @@ end
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if DEEP
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R1_1 = ( 12 *LAMBDA ).round(3)
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R1_2 = ( 18 *LAMBDA ).round(3)
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# We are assuming the wells are at the same potential since
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# DRC can't tell otherwise
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#R1_2 = ( 18 *LAMBDA ).round(3)
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R1_2 = ( 6 *LAMBDA ).round(3)
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R2_3 = ( 6 *LAMBDA ).round(3)
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R3_2 = ( 3 *LAMBDA ).round(3)
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R3_2_a = ( 4 *LAMBDA ).round(3)
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@ -414,7 +421,7 @@ class DRC::DRCLayer
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end
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DRC::DRCLayer::new(@engine, new_data)
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end
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end
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end
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# layers definitions
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########################
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@ -456,7 +463,7 @@ info("Layers definitions")
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# layers processing
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########################
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info("Layers processing")
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#CHIP = extent.sized(1.0)
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#CHIP = extent.sized(1.0)
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NP = AA & Nselect
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PP = AA & Pselect
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NSTP = NP.and(NW)
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