Altering certain tests to include multiport checks.

This commit is contained in:
Michael Timothy Grimes
2018-09-09 22:08:03 -07:00
parent 27427d4192
commit 586c72e4f7
5 changed files with 70 additions and 11 deletions
+5 -5
View File
@@ -24,17 +24,17 @@ class precharge_test(openram_test):
debug.info(2, "Checking precharge for pbitcell")
OPTS.bitcell = "pbitcell"
OPTS.num_rw_ports = 2
OPTS.num_r_ports = 2
OPTS.num_w_ports = 2
OPTS.num_rw_ports = 1
OPTS.num_r_ports = 1
OPTS.num_w_ports = 1
pc = precharge_array.precharge_array(columns=3, bitcell_bl="bl0", bitcell_br="br0")
self.local_check(pc)
pc = precharge_array.precharge_array(columns=3, bitcell_bl="bl2", bitcell_br="br2")
pc = precharge_array.precharge_array(columns=3, bitcell_bl="bl1", bitcell_br="br1")
self.local_check(pc)
pc = precharge_array.precharge_array(columns=3, bitcell_bl="bl4", bitcell_br="br4")
pc = precharge_array.precharge_array(columns=3, bitcell_bl="bl2", bitcell_br="br2")
self.local_check(pc)
globals.end_openram()