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write only used bitcells to top level in stim and pex output

This commit is contained in:
jcirimel 2020-05-28 23:56:15 -07:00
parent 0f9e38881c
commit 575278998d
2 changed files with 19 additions and 12 deletions
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18
compiler/characterizer/stimuli.py
View File

@ -58,14 +58,20 @@ class stimuli():
for pin in pins: for pin in pins:
self.sf.write("{0} ".format(pin)) self.sf.write("{0} ".format(pin))
for bank in range(OPTS.num_banks): for bank in range(OPTS.num_banks):
for row in range(int(OPTS.num_words / OPTS.words_per_row)): row = int(OPTS.num_words / OPTS.words_per_row) - 1
for col in range(int(OPTS.word_size * OPTS.words_per_row)): col = int(OPTS.word_size * OPTS.words_per_row) - 1
self.sf.write("bitcell_Q_b{0}_r{1}_c{2} ".format(bank,row,col)) self.sf.write("bitcell_Q_b{0}_r{1}_c{2} ".format(bank,row,col))
self.sf.write("bitcell_Q_bar_b{0}_r{1}_c{2} ".format(bank,row,col)) self.sf.write("bitcell_Q_bar_b{0}_r{1}_c{2} ".format(bank,row,col))
# can't add all bitcells to top level due to ngspice max port count of 1005
# for row in range(int(OPTS.num_words / OPTS.words_per_row)):
# for col in range(int(OPTS.word_size * OPTS.words_per_row)):
# self.sf.write("bitcell_Q_b{0}_r{1}_c{2} ".format(bank,row,col))
# self.sf.write("bitcell_Q_bar_b{0}_r{1}_c{2} ".format(bank,row,col))
for bank in range(OPTS.num_banks):
for col in range(OPTS.word_size * OPTS.words_per_row): for col in range(OPTS.word_size * OPTS.words_per_row):
for port in range(OPTS.num_r_ports + OPTS.num_w_ports + OPTS.num_rw_ports): for port in range(OPTS.num_r_ports + OPTS.num_w_ports + OPTS.num_rw_ports):
self.sf.write("bl{0}_{2} ".format(port, row, col)) self.sf.write("bl{0}_{1} ".format(port, col))
self.sf.write("br{0}_{2} ".format(port, row, col)) self.sf.write("br{0}_{1} ".format(port, col))
self.sf.write("s_en{0} ".format(bank)) self.sf.write("s_en{0} ".format(bank))

13
compiler/verify/magic.py
View File

@ -415,14 +415,15 @@ def correct_port(name, output_file_name, ref_file_name):
bitcell_list = "+ " bitcell_list = "+ "
for bank in range(OPTS.num_banks): for bank in range(OPTS.num_banks):
for row in range(int(OPTS.num_words / OPTS.words_per_row)): for bank in range(OPTS.num_banks):
for col in range(int(OPTS.word_size * OPTS.words_per_row)): row = int(OPTS.num_words / OPTS.words_per_row) - 1
bitcell_list += "bitcell_Q_b{0}_r{1}_c{2} ".format(bank, row, col) col = int(OPTS.word_size * OPTS.words_per_row) - 1
bitcell_list += "bitcell_Q_bar_b{0}_r{1}_c{2} ".format(bank, row, col) bitcell_list += "bitcell_Q_b{0}_r{1}_c{2} ".format(bank,row,col)
bitcell_list += "bitcell_Q_bar_b{0}_r{1}_c{2} ".format(bank,row,col)
for col in range(OPTS.word_size * OPTS.words_per_row): for col in range(OPTS.word_size * OPTS.words_per_row):
for port in range(OPTS.num_r_ports + OPTS.num_w_ports + OPTS.num_rw_ports): for port in range(OPTS.num_r_ports + OPTS.num_w_ports + OPTS.num_rw_ports):
bitcell_list += "bl{0}_{2} ".format(bank, row, col) bitcell_list += "bl{0}_{1} ".format(bank, col)
bitcell_list += "br{0}_{2} ".format(bank, row, col) bitcell_list += "br{0}_{1} ".format(bank, col)
bitcell_list += "\n" bitcell_list += "\n"
control_list = "+ " control_list = "+ "